Peter, When you run the sensor from in triggered mode (TRIG=4) from the internal generator (TRIG_CONDITION =0) you can still generate the output signal by specifying appropriate value for TRIG_OUT ( http://wiki.elphel.com/index.php?title=Trigger ). With the current code that output signal will take place just before the start of the sensor exposure, so you need to set exposure time to >= frame readout time and delay flash by that time (approximately 1/15 sec). I'm working on the FPGA code now and I added re-routing delay module from the input to output when (TRIG_CONDITION =0) , so it will be possible to generate flash trigger directly, w/o the need of additional external trigger delay.
All synchronization I/Os require 10369 (not 10359) board to have convenient access to the I/O lines - it has both output drivers and the signals are routed to external modular connector. The system board (10353) has only the high density inter-board connector that contains just the FPGA I/O signals but no output drivers. Andrey
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