Author: andrew
Date: Mon Oct  2 14:22:35 2017
New Revision: 324207
URL: https://svnweb.freebsd.org/changeset/base/324207

Log:
  Add a memory barrier to ensure the atomic write is visible to the other
  CPUs before waking them up.
  
  Sponsored by: DARPA, AFRL

Modified:
  head/sys/arm64/arm64/mp_machdep.c

Modified: head/sys/arm64/arm64/mp_machdep.c
==============================================================================
--- head/sys/arm64/arm64/mp_machdep.c   Mon Oct  2 14:19:31 2017        
(r324206)
+++ head/sys/arm64/arm64/mp_machdep.c   Mon Oct  2 14:22:35 2017        
(r324207)
@@ -236,7 +236,10 @@ release_aps(void *dummy __unused)
 
        atomic_store_rel_int(&aps_ready, 1);
        /* Wake up the other CPUs */
-       __asm __volatile("sev");
+       __asm __volatile(
+           "dsb ishst  \n"
+           "sev        \n"
+           ::: "memory");
 
        printf("Release APs\n");
 
_______________________________________________
[email protected] mailing list
https://lists.freebsd.org/mailman/listinfo/svn-src-all
To unsubscribe, send any mail to "[email protected]"

Reply via email to