Author: adrian
Date: Wed Nov 18 06:24:21 2015
New Revision: 291010
URL: https://svnweb.freebsd.org/changeset/base/291010
Log:
uart(4) - make the 8250 uart baudrate tolerance build time tweakable.
It turns out on a 16550 w/ a 25MHz SoC reference clock you get a little
over 3% error at 115200 baud, which causes this to fail.
Just .. cope. Things cope these days.
Default to 30 (3.0%) as before, but allow UART_DEV_TOLERANCE_PCT to be
set at build time to change that.
Modified:
head/sys/conf/options
head/sys/dev/uart/uart_dev_ns8250.c
Modified: head/sys/conf/options
==============================================================================
--- head/sys/conf/options Wed Nov 18 02:18:14 2015 (r291009)
+++ head/sys/conf/options Wed Nov 18 06:24:21 2015 (r291010)
@@ -650,6 +650,7 @@ BKTR_NEW_MSP34XX_DRIVER opt_bktr.h
# Options for uart(4)
UART_PPS_ON_CTS opt_uart.h
UART_POLL_FREQ opt_uart.h
+UART_DEV_TOLERANCE_PCT opt_uart.h
# options for bus/device framework
BUS_DEBUG opt_bus.h
Modified: head/sys/dev/uart/uart_dev_ns8250.c
==============================================================================
--- head/sys/dev/uart/uart_dev_ns8250.c Wed Nov 18 02:18:14 2015
(r291009)
+++ head/sys/dev/uart/uart_dev_ns8250.c Wed Nov 18 06:24:21 2015
(r291010)
@@ -25,6 +25,7 @@
*/
#include "opt_platform.h"
+#include "opt_uart.h"
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
@@ -57,6 +58,16 @@ __FBSDID("$FreeBSD$");
#define DEFAULT_RCLK 1843200
+/*
+ * Set the default baudrate tolerance to 3.0%.
+ *
+ * Some embedded boards have odd reference clocks (eg 25MHz)
+ * and we need to handle higher variances in the target baud rate.
+ */
+#ifndef UART_DEV_TOLERANCE_PCT
+#define UART_DEV_TOLERANCE_PCT 30
+#endif /* UART_DEV_TOLERANCE_PCT */
+
static int broken_txfifo = 0;
SYSCTL_INT(_hw, OID_AUTO, broken_txfifo, CTLFLAG_RWTUN,
&broken_txfifo, 0, "UART FIFO has QEMU emulation bug");
@@ -123,8 +134,8 @@ ns8250_divisor(int rclk, int baudrate)
/* 10 times error in percent: */
error = ((actual_baud - baudrate) * 2000 / baudrate + 1) >> 1;
- /* 3.0% maximum error tolerance: */
- if (error < -30 || error > 30)
+ /* enforce maximum error tolerance: */
+ if (error < -UART_DEV_TOLERANCE_PCT || error > UART_DEV_TOLERANCE_PCT)
return (0);
return (divisor);
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