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I THINK you need to specify whether it is a "read" or a "write" since the
placement of the interrupt with respect to the data phase needs to be
different. (although I'm not sure that affects your basic question ).
...Harlan
---------------- Begin Message 1----------------
Date: 7/11/01 1:39 PM
Received: 7/11/01 2:00 PM
From: [EMAIL PROTECTED]
Reply-To: Tom Colligan, [EMAIL PROTECTED]
To: '[EMAIL PROTECTED]', [EMAIL PROTECTED]
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Does anybody know the correct answer to his inquiry?
I don't know if this is addressed specifically in the ATA-6 spec.
thanks in advance for your help
- Sumit
We have a question regarding a SERVICE interrupt described in
ATA6 as following:
***************************************************************
8.50.21 Enable/disable SERVICE interrupt
Subcommand codes 5Eh and DEh allow a host to enable or disable
the asserting of an interrupt pending when DRQ is set to one in
response to a SERVICE command.
***************************************************************
Question::
In the case of (2), is it required that the INTRQ signal be
asserted necessarily twice? Or is it possible to omit the second
assertion (at the moment BSY gets low)?
We think that this description requires each signal be asserted
as following chart:
(1)When SERVICE interrupt is disabled
SERVICE Cmd Issue
|
| |----------------| Data Xfr
V___ ___
BSY __| |________________| |______
________________
DRQ ______| |__________
___
INTRQ ___________________________| |__
(2)When SERVICE interrupt is enabled
___ ___
BSY __| |________________| |______
________________
DRQ ______| |__________
___ ___
INTRQ _______| |_______________| |__
Question::
In the case of (2), is it required that the INTRQ signal be
asserted necessarily twice? Or is it possible to omit the second
assertion (at the moment BSY gets low)?
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