On Sun, 13 May 2018 05:55:13 -0400, Peter Stuge wrote: ... > Tamper detection can fail in two ways: > 1. Detection wipes keys too often. > 2. Detection doesn't wipe key when attacked. > I think which failure mode one prefers depends on the application,
So maybe we want physical hardware fast enough to support either mode, with the choice of mode selectable when synthesizing the Verilog. _______________________________________________ Tech mailing list Tech@cryptech.is https://lists.cryptech.is/listinfo/tech
