Aloha!
On 2020-04-08 19:36, Peter Stuge wrote:
> I suggest:
>
> 1. Move forward with SAMD11 replacing FTDI
> 2. Add CTS+RTS to the UART interface
> 3. If time and space on the board allows it, also connect SPI
>
> Who does the hardware design changes? To support that effort I can
> contribute the required connections on the SAMD11 side.
>
> So far I've used the SAMD11 in the SO-14 package for this, but I can
> provide the pinout also for the QFN24 if that is preferd?
I support this change. I'm comfortable being able to motivate this
change affecting the CryRev project timeline somewhat.
Pavel is the hardware designer. Haven't heard from him in a few days
though. He should have posted some feedback on the packages suggested
for the Lattice FPGA to be used as master key memory.
--
Med vänlig hälsning, Yours
Joachim Strömbergson
========================================================================
Assured AB
========================================================================
_______________________________________________
Tech mailing list
Tech@cryptech.is
https://lists.cryptech.is/listinfo/tech
