There was some discussion of this on misc@ recently. Some Baytrail
boards are setting local APIC flags to 0b11, which is a reserved value.

The acpidump and other info related to the problem is capture over
there, as well.  Ref:
http://marc.info/?l=openbsd-misc&m=140043989412703&w=2

Instead of panicking, make like Linux and FreeBSD and assume level
trigger and low polarity.

Ref: http://www.freebsd.org/cgi/query-pr.cgi?pr=187966

This same system panics later when the Local APIC LINT Pin is set to
strange values for all four CPUs. I'm still thinking about that one, but
it will probably involve mpbios fixups.

This workaround separates the notion of a reserved value and a totally
unexpected value.

Anyway, just sharing this idea while I work away at this one.

Index: arch/amd64/include/mpbiosreg.h
===================================================================
RCS file: /cvs/src/sys/arch/amd64/include/mpbiosreg.h,v
retrieving revision 1.4
diff -u -p -r1.4 mpbiosreg.h
--- arch/amd64/include/mpbiosreg.h      23 Mar 2011 16:54:34 -0000      1.4
+++ arch/amd64/include/mpbiosreg.h      22 May 2014 04:39:59 -0000
@@ -63,12 +63,14 @@
 #define MPS_INTPO_DEF          0
 #define MPS_INTPO_ACTHI                1
 #define MPS_INTPO_ACTLO                3
+#define MPS_INTPO_RESERVED     2
 #define MPS_INTPO_SHIFT                0
 #define MPS_INTPO_MASK         3
 
 #define MPS_INTTR_DEF          0
 #define MPS_INTTR_EDGE         1
 #define MPS_INTTR_LEVEL                3
+#define MPS_INTTR_RESERVED     2
 #define MPS_INTTR_SHIFT                2
 #define MPS_INTTR_MASK         3
 
Index: arch/i386/include/mpbiosreg.h
===================================================================
RCS file: /cvs/src/sys/arch/i386/include/mpbiosreg.h,v
retrieving revision 1.5
diff -u -p -r1.5 mpbiosreg.h
--- arch/i386/include/mpbiosreg.h       23 Mar 2011 16:54:35 -0000      1.5
+++ arch/i386/include/mpbiosreg.h       22 May 2014 04:52:29 -0000
@@ -63,12 +63,14 @@
 #define MPS_INTPO_DEF          0
 #define MPS_INTPO_ACTHI                1
 #define MPS_INTPO_ACTLO                3
+#define MPS_INTPO_RESERVED     2
 #define MPS_INTPO_SHIFT                0
 #define MPS_INTPO_MASK         3
 
 #define MPS_INTTR_DEF          0
 #define MPS_INTTR_EDGE         1
 #define MPS_INTTR_LEVEL                3
+#define MPS_INTTR_RESERVED     2
 #define MPS_INTTR_SHIFT                2
 #define MPS_INTTR_MASK         3
 
Index: dev/acpi/acpimadt.c
===================================================================
RCS file: /cvs/src/sys/dev/acpi/acpimadt.c,v
retrieving revision 1.27
diff -u -p -r1.27 acpimadt.c
--- dev/acpi/acpimadt.c 18 May 2014 20:16:29 -0000      1.27
+++ dev/acpi/acpimadt.c 22 May 2014 23:02:55 -0000
@@ -165,6 +165,10 @@ acpimadt_cfg_intr(int flags, u_int32_t *
        case MPS_INTPO_ACTLO:
                *redir |= IOAPIC_REDLO_ACTLO;
                break;
+       case MPS_INTPO_RESERVED:
+               printf("reserved MPS interrupt polarity %d, using low 
polarity\n", mpspo);
+               *redir |= IOAPIC_REDLO_ACTLO;
+               break;
        default:
                panic("unknown MPS interrupt polarity %d", mpspo);
        }
@@ -178,6 +182,10 @@ acpimadt_cfg_intr(int flags, u_int32_t *
        case MPS_INTTR_DEF:
        case MPS_INTTR_EDGE:
                *redir &= ~IOAPIC_REDLO_LEVEL;
+               break;
+       case MPS_INTTR_RESERVED:
+               printf("reserved MPS interrupt trigger %d, using level 
trigger\n", mpspo);
+               *redir |= IOAPIC_REDLO_LEVEL;
                break;
        default:
                panic("unknown MPS interrupt trigger %d", mpstrig);

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