On Thu, May 22, 2014 at 08:27:40PM -0400, John D. Verne wrote: > There was some discussion of this on misc@ recently. Some Baytrail > boards are setting local APIC flags to 0b11, which is a reserved value. > > The acpidump and other info related to the problem is capture over > there, as well. Ref: > http://marc.info/?l=openbsd-misc&m=140043989412703&w=2 > > Instead of panicking, make like Linux and FreeBSD and assume level > trigger and low polarity. > > Ref: http://www.freebsd.org/cgi/query-pr.cgi?pr=187966 > > This same system panics later when the Local APIC LINT Pin is set to > strange values for all four CPUs. I'm still thinking about that one, but > it will probably involve mpbios fixups. > > This workaround separates the notion of a reserved value and a totally > unexpected value. > > Anyway, just sharing this idea while I work away at this one. > My last diff was terrible. This is less terrible.
The change to lapic.c is just wrong, but it allows -current to boot with acpi enabled so I can dig into this more. The AML info at http://www.clevermonkey.org/OpenBSD/ACPI_ASRock_IMB-150.txt.gz is still valid. I also have a dmesg from this kernel with MBVERBOSE enabled, if it matters. Index: arch/amd64/amd64/lapic.c =================================================================== RCS file: /cvs/src/sys/arch/amd64/amd64/lapic.c,v retrieving revision 1.31 diff -u -p -r1.31 lapic.c --- arch/amd64/amd64/lapic.c 29 Mar 2014 18:09:28 -0000 1.31 +++ arch/amd64/amd64/lapic.c 27 May 2014 00:20:03 -0000 @@ -195,7 +195,7 @@ lapic_set_lvt(void) || mpi->cpu_id == ci->ci_apicid)) { #ifdef DIAGNOSTIC if (mpi->ioapic_pin > 1) - panic("lapic_set_lvt: bad pin value %d", + printf("lapic_set_lvt: bad pin value %d\n", mpi->ioapic_pin); #endif if (mpi->ioapic_pin == 0) Index: arch/amd64/include/mpbiosreg.h =================================================================== RCS file: /cvs/src/sys/arch/amd64/include/mpbiosreg.h,v retrieving revision 1.4 diff -u -p -r1.4 mpbiosreg.h --- arch/amd64/include/mpbiosreg.h 23 Mar 2011 16:54:34 -0000 1.4 +++ arch/amd64/include/mpbiosreg.h 26 May 2014 01:06:05 -0000 @@ -62,12 +62,14 @@ #define MPS_INTPO_DEF 0 #define MPS_INTPO_ACTHI 1 +#define MPS_INTPO_RESERVED 2 #define MPS_INTPO_ACTLO 3 #define MPS_INTPO_SHIFT 0 #define MPS_INTPO_MASK 3 #define MPS_INTTR_DEF 0 #define MPS_INTTR_EDGE 1 +#define MPS_INTTR_RESERVED 2 #define MPS_INTTR_LEVEL 3 #define MPS_INTTR_SHIFT 2 #define MPS_INTTR_MASK 3 Index: arch/i386/include/mpbiosreg.h =================================================================== RCS file: /cvs/src/sys/arch/i386/include/mpbiosreg.h,v retrieving revision 1.5 diff -u -p -r1.5 mpbiosreg.h --- arch/i386/include/mpbiosreg.h 23 Mar 2011 16:54:35 -0000 1.5 +++ arch/i386/include/mpbiosreg.h 26 May 2014 01:06:44 -0000 @@ -62,12 +62,14 @@ #define MPS_INTPO_DEF 0 #define MPS_INTPO_ACTHI 1 +#define MPS_INTPO_RESERVED 2 #define MPS_INTPO_ACTLO 3 #define MPS_INTPO_SHIFT 0 #define MPS_INTPO_MASK 3 #define MPS_INTTR_DEF 0 #define MPS_INTTR_EDGE 1 +#define MPS_INTTR_RESERVED 2 #define MPS_INTTR_LEVEL 3 #define MPS_INTTR_SHIFT 2 #define MPS_INTTR_MASK 3 Index: dev/acpi/acpimadt.c =================================================================== RCS file: /cvs/src/sys/dev/acpi/acpimadt.c,v retrieving revision 1.27 diff -u -p -r1.27 acpimadt.c --- dev/acpi/acpimadt.c 18 May 2014 20:16:29 -0000 1.27 +++ dev/acpi/acpimadt.c 26 May 2014 01:41:19 -0000 @@ -162,6 +162,9 @@ acpimadt_cfg_intr(int flags, u_int32_t * case MPS_INTPO_ACTHI: *redir &= ~IOAPIC_REDLO_ACTLO; break; + case MPS_INTPO_RESERVED: + printf("reserved MPS interrupt polarity %d, assuming low polarity\n", mpspo); + /* Fall-through */ case MPS_INTPO_ACTLO: *redir |= IOAPIC_REDLO_ACTLO; break; @@ -172,6 +175,9 @@ acpimadt_cfg_intr(int flags, u_int32_t * *redir |= (IOAPIC_REDLO_DEL_LOPRI << IOAPIC_REDLO_DEL_SHIFT); switch (mpstrig) { + case MPS_INTTR_RESERVED: + printf("reserved MPS interrupt trigger %d, assuming level trigger\n", mpstrig); + /* Fall-through */ case MPS_INTTR_LEVEL: *redir |= IOAPIC_REDLO_LEVEL; break;
