The following diff attempts to fix two small bge(4) bugs:
- the first chunk fixes what seems to be a logic error on BCM 5720,
where the code attemps to preserve the state of four bits, but these
have actually already been set in the local variable by the call to
bge_dma_swap_options() immediately above. For some reason the
bge_dma_swap_options() logic does not affect BCM 5762, and I'm not
sure whether this is a bug or not.
- the second chunk repairs BCM5704 A3 support, as found on some G5 Xserve
(RackMac3,1), by using the proper function pointer to write a magic
register. Apparently, using the wrong function only works once, which
allows the driver to attach, but as soon as you attempt to give it an
IP address, the machine freezes without that change.
I could only test this on:
bge0 at pci0 dev 3 function 0 "Broadcom BCM5701" rev 0x15, BCM5701 B5 (0x105):
irq 3, xbow irq 60, address 08:00:69:11:da:82
bge0 at pci1 dev 5 function 0 "Broadcom BCM5703X" rev 0x02, BCM5702/5703 A2
(0x1002): dec 6600 irq 4, address 00:02:a5:c6:11:b3
bge0 at pci3 dev 4 function 0 "Broadcom BCM5704C" rev 0x03, BCM5704 A3
(0x2003): irq 54, address 00:0d:93:9b:f2:94
tests on more models would be welcome, as the second chunk affects
almost all models.
Index: if_bge.c
===================================================================
RCS file: /OpenBSD/src/sys/dev/pci/if_bge.c,v
retrieving revision 1.369
diff -u -p -U4 -r1.369 if_bge.c
--- if_bge.c 19 Jul 2015 06:28:12 -0000 1.369
+++ if_bge.c 15 Oct 2015 17:19:49 -0000
@@ -1764,8 +1764,11 @@ bge_chipinit(struct bge_softc *sc)
mode_ctl = bge_dma_swap_options(sc);
if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5720 ||
BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5762) {
/* Retain Host-2-BMC settings written by APE firmware. */
+ mode_ctl &= ~(BGE_MODECTL_BYTESWAP_B2HRX_DATA |
+ BGE_MODECTL_WORDSWAP_B2HRX_DATA |
+ BGE_MODECTL_B2HRX_ENABLE | BGE_MODECTL_HTX2B_ENABLE);
mode_ctl |= CSR_READ_4(sc, BGE_MODE_CTL) &
(BGE_MODECTL_BYTESWAP_B2HRX_DATA |
BGE_MODECTL_WORDSWAP_B2HRX_DATA |
BGE_MODECTL_B2HRX_ENABLE | BGE_MODECTL_HTX2B_ENABLE);
@@ -3229,9 +3232,9 @@ bge_reset(struct bge_softc *sc)
* Write the magic number to SRAM at offset 0xB50.
* When firmware finishes its initialization it will
* write ~BGE_SRAM_FW_MB_MAGIC to the same location.
*/
- bge_writemem_ind(sc, BGE_SOFTWARE_GENCOMM, BGE_MAGIC_NUMBER);
+ write_op(sc, BGE_SOFTWARE_GENCOMM, BGE_MAGIC_NUMBER);
reset = BGE_MISCCFG_RESET_CORE_CLOCKS | BGE_32BITTIME_66MHZ;
if (sc->bge_flags & BGE_PCIE) {
