Currently, the soft-float bits in libc on sparc64 export not just the
sparc ABI symbols _Q_* and _Qp_*, but also the internal implementation
bits, __fpu_*
AFAICT, the __fpu_* names are not required by our tool chain; in contrast,
calls to the _Q* names are generated by gcc.
Diff below cleans this up, hiding the __fpu_* symbols, removing five
__fpu_* functions that are unused, and making sure that (almost) all the
internal references to _Q* go direct via hidden internal names. This
reduces the PLT to just seven entries.
Am I missing some secret requirement for __fpu_* to be exported?
Assuming not: oks?
Philip
Index: arch/sparc64/Symbols.list
===================================================================
RCS file: /cvs/src/lib/libc/arch/sparc64/Symbols.list,v
retrieving revision 1.3
diff -u -p -r1.3 Symbols.list
--- arch/sparc64/Symbols.list 13 Sep 2015 08:31:47 -0000 1.3
+++ arch/sparc64/Symbols.list 8 May 2016 05:51:42 -0000
@@ -51,32 +51,6 @@ _Qp_uxtoq
_Qp_xtoq
__builtin_saveregs
__dtoul
-__fpu_add
-__fpu_compare
-__fpu_div
-__fpu_dtof
-__fpu_explode
-__fpu_ftod
-__fpu_ftoi
-__fpu_ftoq
-__fpu_ftos
-__fpu_ftox
-__fpu_getreg32
-__fpu_getreg64
-__fpu_implode
-__fpu_itof
-__fpu_mul
-__fpu_newnan
-__fpu_norm
-__fpu_qtof
-__fpu_setreg32
-__fpu_setreg64
-__fpu_shr
-__fpu_sqrt
-__fpu_stof
-__fpu_uitof
-__fpu_uxtof
-__fpu_xtof
__ftoul
__plt_end
__plt_start
Index: arch/sparc64/fpu/Makefile.inc
===================================================================
RCS file: /cvs/src/lib/libc/arch/sparc64/fpu/Makefile.inc,v
retrieving revision 1.1
diff -u -p -r1.1 Makefile.inc
--- arch/sparc64/fpu/Makefile.inc 21 Jul 2003 18:41:30 -0000 1.1
+++ arch/sparc64/fpu/Makefile.inc 8 May 2016 05:51:42 -0000
@@ -1,4 +1,5 @@
# $OpenBSD: Makefile.inc,v 1.1 2003/07/21 18:41:30 jason Exp $
SRCS += fpu_add.c fpu_compare.c fpu_div.c fpu_explode.c fpu_implode.c \
- fpu_mul.c fpu_qp.c fpu_q.c fpu_sqrt.c fpu_subr.c fpu_reg.c
+ fpu_mul.c fpu_qp.c fpu_q.c fpu_sqrt.c fpu_subr.c
+# fpu_reg.c
.PATH: ${.CURDIR}/arch/sparc64/fpu
Index: arch/sparc64/fpu/fpu_explode.c
===================================================================
RCS file: /cvs/src/lib/libc/arch/sparc64/fpu/fpu_explode.c,v
retrieving revision 1.7
diff -u -p -r1.7 fpu_explode.c
--- arch/sparc64/fpu/fpu_explode.c 5 Dec 2012 23:19:59 -0000 1.7
+++ arch/sparc64/fpu/fpu_explode.c 8 May 2016 05:51:42 -0000
@@ -292,6 +292,7 @@ __fpu_qtof(fp, i, j, k, l)
FP_TOF(exp, EXT_EXP_BIAS, frac, f0, f1, f2, f3);
}
+#if 0 /* __fpu_explode is unused */
/*
* Explode the contents of a / regpair / regquad.
* If the input is a signalling NaN, an NV (invalid) exception
@@ -362,3 +363,4 @@ __fpu_explode(fe, fp, type, reg)
DUMPFPN(FPE_REG, fp);
DPRINTF(FPE_REG, ("\n"));
}
+#endif
Index: arch/sparc64/fpu/fpu_extern.h
===================================================================
RCS file: /cvs/src/lib/libc/arch/sparc64/fpu/fpu_extern.h,v
retrieving revision 1.3
diff -u -p -r1.3 fpu_extern.h
--- arch/sparc64/fpu/fpu_extern.h 26 Jun 2008 05:42:05 -0000 1.3
+++ arch/sparc64/fpu/fpu_extern.h 8 May 2016 05:51:42 -0000
@@ -40,6 +40,7 @@ union instr;
struct fpemu;
struct fpn;
+__BEGIN_HIDDEN_DECLS
/* fpu.c */
int __fpu_exception(struct utrapframe *tf);
@@ -86,5 +87,6 @@ int __fpu_shr(register struct fpn *, reg
void __fpu_norm(register struct fpn *);
/* Build a new Quiet NaN (sign=0, frac=all 1's). */
struct fpn *__fpu_newnan(register struct fpemu *);
+__END_HIDDEN_DECLS
#endif /* !_SPARC64_FPU_FPU_EXTERN_H_ */
Index: arch/sparc64/fpu/fpu_q.h
===================================================================
RCS file: /cvs/src/lib/libc/arch/sparc64/fpu/fpu_q.h,v
retrieving revision 1.2
diff -u -p -r1.2 fpu_q.h
--- arch/sparc64/fpu/fpu_q.h 3 Feb 2004 17:18:13 -0000 1.2
+++ arch/sparc64/fpu/fpu_q.h 8 May 2016 05:51:42 -0000
@@ -70,3 +70,23 @@ int _Qp_fgt(long double *, long double *
int _Qp_flt(long double *, long double *);
int _Qp_fne(long double *, long double *);
void _Qp_sqrt(long double *, long double *);
+
+PROTO_NORMAL(_Qp_add);
+PROTO_NORMAL(_Qp_div);
+PROTO_NORMAL(_Qp_dtoq);
+PROTO_NORMAL(_Qp_feq);
+PROTO_NORMAL(_Qp_fge);
+PROTO_NORMAL(_Qp_fgt);
+PROTO_NORMAL(_Qp_fle);
+PROTO_NORMAL(_Qp_flt);
+PROTO_NORMAL(_Qp_fne);
+PROTO_NORMAL(_Qp_itoq);
+PROTO_NORMAL(_Qp_mul);
+PROTO_NORMAL(_Qp_qtod);
+PROTO_NORMAL(_Qp_qtoi);
+PROTO_NORMAL(_Qp_qtos);
+PROTO_NORMAL(_Qp_qtoui);
+PROTO_NORMAL(_Qp_sqrt);
+PROTO_NORMAL(_Qp_stoq);
+PROTO_NORMAL(_Qp_sub);
+PROTO_NORMAL(_Qp_uitoq);
Index: arch/sparc64/fpu/fpu_qp.c
===================================================================
RCS file: /cvs/src/lib/libc/arch/sparc64/fpu/fpu_qp.c,v
retrieving revision 1.5
diff -u -p -r1.5 fpu_qp.c
--- arch/sparc64/fpu/fpu_qp.c 17 Apr 2014 09:01:25 -0000 1.5
+++ arch/sparc64/fpu/fpu_qp.c 8 May 2016 05:51:42 -0000
@@ -37,7 +37,8 @@ __FBSDID("$FreeBSD: src/lib/libc/sparc64
#include "fpu_extern.h"
#define _QP_OP(op) \
-void _Qp_ ## op(u_int *c, u_int *a, u_int *b); \
+__dso_hidden void _Qp_ ## op(u_int *c, u_int *a, u_int *b); \
+PROTO_NORMAL(_Qp_ ## op); \
void \
_Qp_ ## op(u_int *c, u_int *a, u_int *b) \
{ \
@@ -52,10 +53,12 @@ _Qp_ ## op(u_int *c, u_int *a, u_int *b)
fe.fe_f2.fp_class = __fpu_qtof(&fe.fe_f2, b[0], b[1], b[2], b[3]); \
r = __fpu_ ## op(&fe); \
c[0] = __fpu_ftoq(&fe, r, c); \
-}
+} \
+DEF_STRONG(_Qp_ ## op);
#define _QP_TTOQ(qname, fname, ntype, atype, signed, ...) \
void _Qp_ ## qname ## toq(u_int *c, ntype n); \
+PROTO_NORMAL(_Qp_ ## qname ## toq); \
void \
_Qp_ ## qname ## toq(u_int *c, ntype n) \
{ \
@@ -67,10 +70,12 @@ _Qp_ ## qname ## toq(u_int *c, ntype n)
fe.fe_f1.fp_sticky = 0; \
fe.fe_f1.fp_class = __fpu_ ## fname ## tof(&fe.fe_f1, __VA_ARGS__); \
c[0] = __fpu_ftoq(&fe, &fe.fe_f1, c); \
-}
+} \
+DEF_STRONG(_Qp_ ## qname ## toq);
#define _QP_QTOT4(qname, fname, type, x) \
type _Qp_qto ## qname(u_int *c); \
+PROTO_NORMAL(_Qp_qto ## qname); \
type \
_Qp_qto ## qname(u_int *c) \
{ \
@@ -84,10 +89,12 @@ _Qp_qto ## qname(u_int *c) \
fe.fe_f1.fp_class = __fpu_qtof(&fe.fe_f1, c[0], c[1], c[2], c[3]); \
a[0] = __fpu_fto ## fname(&fe, &fe.fe_f1, x); \
return (n); \
-}
+} \
+DEF_STRONG(_Qp_qto ## qname);
#define _QP_QTOT3(qname, fname, type) \
type _Qp_qto ## qname(u_int *c); \
+PROTO_NORMAL(_Qp_qto ## qname); \
type \
_Qp_qto ## qname(u_int *c) \
{ \
@@ -101,10 +108,12 @@ _Qp_qto ## qname(u_int *c) \
fe.fe_f1.fp_class = __fpu_qtof(&fe.fe_f1, c[0], c[1], c[2], c[3]); \
a[0] = __fpu_fto ## fname(&fe, &fe.fe_f1); \
return (n); \
-}
+} \
+DEF_STRONG(_Qp_qto ## qname);
#define _QP_QTOT(qname, fname, type, ...) \
type _Qp_qto ## qname(u_int *c); \
+PROTO_NORMAL(_Qp_qto ## qname); \
type \
_Qp_qto ## qname(u_int *c) \
{ \
@@ -118,7 +127,8 @@ _Qp_qto ## qname(u_int *c) \
fe.fe_f1.fp_class = __fpu_qtof(&fe.fe_f1, c[0], c[1], c[2], c[3]); \
a[0] = __fpu_fto ## fname(&fe, &fe.fe_f1, ## __VA_ARGS__); \
return (n); \
-}
+} \
+DEF_STRONG(_Qp_qto ## qname);
#define FCC_EQ(fcc) ((fcc) == FSR_CC_EQ)
#define FCC_GE(fcc) ((fcc) == FSR_CC_EQ || (fcc) == FSR_CC_GT)
@@ -132,6 +142,7 @@ _Qp_qto ## qname(u_int *c) \
#define _QP_CMP(name, cmpe, test) \
int _Qp_ ## name(u_int *a, u_int *b) ; \
+PROTO_NORMAL(_Qp_ ## name); \
int \
_Qp_ ## name(u_int *a, u_int *b) \
{ \
@@ -145,9 +156,11 @@ _Qp_ ## name(u_int *a, u_int *b) \
fe.fe_f2.fp_class = __fpu_qtof(&fe.fe_f2, b[0], b[1], b[2], b[3]); \
__fpu_compare(&fe, cmpe, 0); \
return (test(FSR_GET_FCC0(fe.fe_fsr))); \
-}
+} \
+DEF_STRONG(_Qp_ ## name);
void _Qp_sqrt(u_int *c, u_int *a);
+PROTO_NORMAL(_Qp_sqrt);
void
_Qp_sqrt(u_int *c, u_int *a)
{
@@ -160,6 +173,7 @@ _Qp_sqrt(u_int *c, u_int *a)
r = __fpu_sqrt(&fe);
c[0] = __fpu_ftoq(&fe, r, c);
}
+DEF_STRONG(_Qp_sqrt);
_QP_OP(add)
_QP_OP(div)
