Tested by running GENERIC.MP built by
make CC=clang COMPILER_VERSION=clang
on a CN6120 device.
Index: sys/arch/mips64/mips64/fp_emulate.c
===================================================================
RCS file: /cvs/src/sys/arch/mips64/mips64/fp_emulate.c,v
retrieving revision 1.20
diff -u -p -u -r1.20 fp_emulate.c
--- sys/arch/mips64/mips64/fp_emulate.c 22 Oct 2018 17:31:25 -0000 1.20
+++ sys/arch/mips64/mips64/fp_emulate.c 3 Jan 2019 09:34:57 -0000
@@ -158,8 +158,14 @@ MipsFPTrap(struct trapframe *tf)
sr = getsr();
setsr(sr | SR_COP_1_BIT);
- __asm__ volatile ("cfc1 %0, $31" : "=r" (fsr));
- __asm__ volatile ("cfc1 %0, $31" : "=r" (fsr));
+ __asm__ volatile (".set push\n\t"
+ ".set hardfloat\n\t"
+ "cfc1 %0, $31\n\t"
+ ".set pop" : "=r" (fsr));
+ __asm__ volatile (".set push\n\t"
+ ".set hardfloat\n\t"
+ "cfc1 %0, $31\n\t"
+ ".set pop" : "=r" (fsr));
/*
* If this is not an unimplemented operation, but a genuine
@@ -399,7 +405,10 @@ deliver:
tf->fsr = fsr;
if (CPU_HAS_FPU(ci)) {
- __asm__ volatile ("ctc1 %0, $31" :: "r" (fsr));
+ __asm__ volatile (".set push\n\t"
+ ".set hardfloat\n\t"
+ "ctc1 %0, $31\n\t"
+ ".set pop" :: "r" (fsr));
/* disable fpu before returning to trap() */
setsr(sr);
}
Index: sys/arch/mips64/mips64/lcore_float.S
===================================================================
RCS file: /cvs/src/sys/arch/mips64/mips64/lcore_float.S,v
retrieving revision 1.22
diff -u -p -u -r1.22 lcore_float.S
--- sys/arch/mips64/mips64/lcore_float.S 3 Oct 2012 11:18:23 -0000 1.22
+++ sys/arch/mips64/mips64/lcore_float.S 3 Jan 2019 09:34:57 -0000
@@ -39,6 +39,7 @@
.set mips3
.set noreorder # Noreorder is default style!
+ .set hardfloat
/*----------------------------------------------------------------------------
*
Index: sys/arch/mips64/mips64/tlbhandler.S
===================================================================
RCS file: /cvs/src/sys/arch/mips64/mips64/tlbhandler.S,v
retrieving revision 1.48
diff -u -p -u -r1.48 tlbhandler.S
--- sys/arch/mips64/mips64/tlbhandler.S 13 Dec 2018 16:35:07 -0000 1.48
+++ sys/arch/mips64/mips64/tlbhandler.S 3 Jan 2019 09:34:57 -0000
@@ -337,7 +337,7 @@ sys_stk_chk:
GET_CPU_INFO(k1, k0)
PTR_L k1, CI_CURPROCPADDR(k1)
PTR_SUBU k0, sp, k1 # check to see if we have a
- sltiu k0, 2048 # valid kernel stack
+ sltiu k0, k0, 2048 # valid kernel stack
beqz k0, go_k_general # yes, handle.
nop
@@ -414,7 +414,8 @@ LEAF(tlb_flush, 0)
mtc0 ta1, COP_0_TLB_INDEX # Set the index register.
#ifdef CPU_OCTEON
dmtc0 v0, COP_0_TLB_HI # Mark entry high as invalid
- PTR_ADDU v0, v0, 2 * PAGE_SIZE
+ li ta2, 2 * PAGE_SIZE
+ PTR_ADDU v0, v0, ta2
#endif
addu ta1, ta1, 1 # Increment index.
TLB_HAZARD
Index: sys/arch/octeon/conf/Makefile.octeon
===================================================================
RCS file: /cvs/src/sys/arch/octeon/conf/Makefile.octeon,v
retrieving revision 1.51
diff -u -p -u -r1.51 Makefile.octeon
--- sys/arch/octeon/conf/Makefile.octeon 31 Oct 2018 10:15:47 -0000 1.51
+++ sys/arch/octeon/conf/Makefile.octeon 3 Jan 2019 09:34:57 -0000
@@ -43,6 +43,10 @@ CMACHFLAGS+= -fno-stack-protector
.if ${IDENT:M-DSMALL_KERNEL}
SORTR= cat
.endif
+.if ${COMPILER_VERSION:Mclang}
+NO_INTEGR_AS= -no-integrated-as
+CWARNFLAGS+= -Wno-address-of-packed-member -Wno-constant-conversion
+.endif
DEBUG?= -g
COPTS?= -O2
@@ -100,7 +104,7 @@ LINKFLAGS+= -S
assym.h: $S/kern/genassym.sh Makefile \
${_archdir}/${_arch}/genassym.cf ${_machdir}/${_mach}/genassym.cf
cat ${_archdir}/${_arch}/genassym.cf ${_machdir}/${_mach}/genassym.cf | \
- sh $S/kern/genassym.sh ${CC} ${CFLAGS} ${CPPFLAGS} -MF
assym.P > assym.h.tmp
+ sh $S/kern/genassym.sh ${CC} ${NO_INTEGR_AS} ${CFLAGS}
${CPPFLAGS} -MF assym.P > assym.h.tmp
sed '1s/.*/assym.h: \\/' assym.P > assym.d
sort -u assym.h.tmp > assym.h
Index: sys/arch/octeon/dev/octcrypto_asm.S
===================================================================
RCS file: /cvs/src/sys/arch/octeon/dev/octcrypto_asm.S,v
retrieving revision 1.1
diff -u -p -u -r1.1 octcrypto_asm.S
--- sys/arch/octeon/dev/octcrypto_asm.S 9 Apr 2018 13:46:15 -0000 1.1
+++ sys/arch/octeon/dev/octcrypto_asm.S 3 Jan 2019 09:34:57 -0000
@@ -648,7 +648,7 @@ LEAF(octcrypto_ghash_init, 0)
dmtc2 t0, MT_GFM_RESINP
jr ra
dmtc2 t1, MT_GFM_RESINP+1
-END(octcrypto_ghash_set_state)
+END(octcrypto_ghash_init)
/*
* void octcrypto_ghash_finish(uint64_t *x)
