Mark Haywood wrote:

> Bill Holler wrote:
>> Mark Haywood wrote:
>>> Eric Saxe wrote:
>>> 
>>>> Mark Haywood wrote:
>>>> 
>>>>> Li, Aubrey wrote:
>>>>> 
>>>>>> I guess Eric means P-state and C-state.
>>>>>> If so, _PSD describes P-State Dependency and _CSD describes
>>>>>> C-state Dependency. 
>>>>>> 
>>>>> Ah. Sorry. I'm familiar with the _CSD (and of course the _PSD),
>>>>> but didn't recognize what Eric was referring to. So, I assume that
>>>>> means _PSD defines the CPUs that share frequency change and
>>>>> C-state dependency defines the CPUs that share a voltage change?
>>>> Right, this is what I'm wondering as well (and I didn't know that
>>>> _CSD and _PSD described those two domains...is that really so?).
>>>> We can have the dispatcher consider thread placement across both
>>>> levels if that makes sense. 
>>>> 
>>> 
>>> The _PSD domains define the CPUs that share P-state dependencies.
>>> P-states are really a combination of frequency and voltage scaling.
>>> 
>>> The _CSD domains define the CPUs that share C-state dependencies. Do
>>> C-states really just equate to voltage scaling? I don't know.
>>> Aubrey or Bill might know. 
>>> 
>> 
>> Are _CSD/c-state domains "flat", or can these be in a tree?
>> For example if there is a 4-core chip with two shared caches?
>> 
>> I am having a hard time envisioning how the PAD will place
>> threads across both _PSD and _CSD defined domains.
>> Would the PAD prefer high p-state domains, and then
>> lower p-state domains, and then lower c-state domains last?
> 
> My guess is that the _CSD and _PSD domains will be identical. I think
> Aubrey will have a better idea.

>From what I understanding on Nehalem:
As for _PSD domain, all logical processors in a specific processor
package
must be the same. A system with one physical package will have one _PSD
domain. the coordination type could be SW_ALL, SW_ANY or HW_ALL.

As for _CSD domain, all logical processors in a specific processor core
must
be the same. A system with one physical package will have four _CSD
domains.
And on Nehalem processors, the coordination type must be HW_ALL.

Thanks,
-Aubrey





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