In message <[EMAIL PROTECTED]>, John Ackermann N8UR writes: >Brendan Minish said the following on 12/30/2006 06:04 PM: >> On the soekris board wiring the following instruction is given on the >> febo site >> http://www.febo.com/time-freq/ntp/soekris/index.html >> >> Run a wire from the junction of R61/R62 (near the backup >> battery) to one of the GPIO pins (I used PIO0, which is on JP3, >> pin 3) and from there to a TTL-compatible PPS signal such as the >> output of the FatPPS. >> >> what is the purpose of this wire from r61/r62? on my board, a 4521 I >> can't find this junction with any degree of certanty, we we pulling the >> GPIO pin low here, or is something else going on? > >R61/R62 is the access point for the high-resolution timer in the CPU >chip. Poul-Henning's extremely elegant hack has the PPS signal start >the timer and at the same time bring the GPIO pin low. Since the GPIO >is interrupt-driven, it will always have jitter based on the Hz value. >So, when the interrupt hits the GPIO pin and it triggers, the code looks >at the timer register to find out how long ago the line actually went >low. That's how he gets nanosecond resolution with a millisecond >interrupt rate. > >I have no idea where the equivalent point would be on the 4521 board, or >if it even has the high-res timer available.
It does, and it is pretty much the exact same place on the PCB. -- Poul-Henning Kamp | UNIX since Zilog Zeus 3.20 [EMAIL PROTECTED] | TCP/IP since RFC 956 FreeBSD committer | BSD since 4.3-tahoe Never attribute to malice what can adequately be explained by incompetence. _______________________________________________ time-nuts mailing list [email protected] https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
