Bruce, thank you for your help! Since it is not known a priori what kind of source will serve for the 10 MHz input I must take into account that it is not the absolute state of art. Since the VCXO solution is not far away from state of the art I consider it the better general choice.
I know Rick's papers about synthesizers since a few years and I have been impressed by them a lot. Until now I have been thinking that the complexity with the additional mixers, buffers and filters is to high but perhaps I am going to re-think it. The private lessons that I received from you concerning low noise amplification make at least the buffer part a handable task. Best regards Ulrich Bangert > -----Ursprüngliche Nachricht----- > Von: [EMAIL PROTECTED] > [mailto:[EMAIL PROTECTED] Im Auftrag von Dr Bruce Griffiths > Gesendet: Freitag, 2. März 2007 00:23 > An: Discussion of precise time and frequency measurement > Betreff: Re: [time-nuts] Low noise frequency multiplication > > > Ulrich Bangert wrote: > > Hi foks, > > > > I want to put forward a similar but slightly different question: > > > > Suppose I need an clock running at around 50 Mhz for an > DDS. Because > > of the DDS it need not be exactly 50 MHz, can be 52 or 54 MHz too. > > Basically this clock shall be derived from a 10 MHz source (OCXO, > > Rubidium...) The OUTPUT of the DDS is to be used as an frequency > > standard, with the DDS being an complete digital steering > circuit. If > > I have the choice to use > > > > a) an harmonic X5 multiplier for the 10 MHz signal > > > > or > > > > b) a 54 MHz VCXO with the following specs: 0.8 ps RMS jitter, noise > > floor -145 db @ 100 kHz offset phase locked to the 10 MHz > > > > what is the prefered solution? Or is the answer dependent on what I > > plan to use the frequency standard for? > > > > TIA > > Ulrich Bangert, DF6JB > > > > > Ulrich > > Whilst in general the answer does depend on the application the > following observations concerning the phase noise floor of the ~50MHz > signal may be useful. > > With a state of the art OCXO with a phase noise floor of less than > -170dBc/Hz multiplying by 5 with a low phase noise multiplier > will raise > the phase noise floor to around -156dBc/Hz somewhat less than that of > your proposed VCXO. However if your 10MHz standard has a phase noise > floor higher than -160dBc/Hz the 54MHz VCXO will have a lower phase > noise floor. > > The phase noise at offsets closer to the carrier will usually be less > when multiplying a low noise 10MHz reference than for a higher VCXO. > > If you only need to adjust the frequency by a few ppm then one can > cleanup the spurs and phase noise of a DDS reducing them to very low > levels by using a cascaded mix and divide technique like that in: > http://www.karlquist.com/FCS95.pdf With such a circuit you can achieve a phase noise floor (if you use appropriate dividers especially in the last stage) approaching that of a good OCXO. With this technique there is no need to use a ~ 50MHz reference for the DDS if all you want is a corrected 10MHz signal. Bruce _______________________________________________ time-nuts mailing list [email protected] https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts _______________________________________________ time-nuts mailing list [email protected] https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
