[EMAIL PROTECTED] wrote: > > In a message dated 4/10/2007 14:28:11 Pacific Daylight Time, > [EMAIL PROTECTED] writes: > > Then we would need to know/measure the jitter of the retiming flipflop. > There appears to be little definitive published data on the jitter of > various logic gates and flipflops. > Consequently a simple reliable method of measuring such jitter would be > useful. > > > > Hi Bruce, > > if I remember correctly, Philips makes a special low-metastability 74 FF > chip. It has guaranteed metastability-recovery time, and seems to be the only > 74 > type chip out there with that claim to fame. > > They really looked at the timing of that part, maybe there are some jitter > specs available, if not in the datasheet then potentially through your local > NXP rep :) > > bye, > Said > > > > ************************************** See what's free at http://www.aol.com. > _______________________________________________ > time-nuts mailing list > [email protected] > https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > > Said
Yes, I remember coming across that device. It is easier to obtain data on the metastability characteristics of gate arrays and SSI flipflops than it is to find reliable data on propagation delay jitter. TI provide info for 74AC and 74HC devices, but make no guarantees, I guess its a matter of the cost of testing. Testing/measuring the metastability characteristics of a flipflop isn't too difficult albeit time consuming. Bruce _______________________________________________ time-nuts mailing list [email protected] https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
