Magne, I had thrown in my claim over the TCH more to continue this funny thread. But now that you take it seriously I must confess that I have been thinking in the last weeks and months about a multi-input time tagging event counter. With todays fpgas it should not be too difficult to design a SOC (System On Chip) that includes
1) a number of inputs, say 8 or so that can accept 1pps signals or frequencies between 1 HZ and say 50 MHz with programmable dividers to make 1 pps signals out of the extrenally applied frequencies. Naturally the inputs would need logic levels which are easily given with 1 pps. For applying sinusoidal signals an external clock shaper as published by Bruce would be needed. 2) One input for the reference frequency of 10 MHz. Using the onchip dcm availbale in the fpga today, an internal frequency of 200-250 Mhz phase locked to the reference can be generated giving a coarse time resolution of 4-5 ns. This clock is expected to have a jitter of 40-60 ps and is applied to a 64 bit counter to make the "coarse" part of the time tag. 3) For each 1 pps signal there is a interpolator of its own. The interpolator is a tapped delay line made out of fast logic elements. On the positive slope of the 1pps the contents of the main reference counter is latched into a 64 bit latch of its own. In addition the interpolator is triggered to make a "photograph" of what the main clock signal was like in terms of time delay against the triggering slope. I intend to make the delay line that long that several periods of the main clock are to be seen within the delay line. This will allow not only an in situ calibration of the delay line (we need to know the average delay per logic element) but also to use not only ONE positive slope of the clock but a number, say 3 or 4. This, in conjunction with the dither introduced by the clock jitter, should give a an overall averaged "fine" result with an resolution better than 100 ps. 4) Since some form of intelligence is needed to handle everything the device features a 32 bit risc controller. This contoller receives an interrupt whenever one of the 1 pps takes place. It will then read out the coarse and the fine result for this pps, compute around a bit with the values and spit out an result in MJD over a rs232 line. This controller will also listen to control commands coming over the rs232 that set the divider ratio for the inputs, initialize the MJD setting and perhaps some other things. Everthing described above can be realized today in a chip that sells for 30.00 US $ in single quantity. Now comes the bad news: The ram for the built in risc controller must be realized externally. That also applies to the controller's code which must be stored non-volatile. The fpga needs an configuration chip. The fpga needs at least 3 very clean supply voltages. That all makes it NOT a real SOC system but to a system out of 4-5 chips partly in nasty 208 pin flat packs. The whole thing cannot be built without having a precision pcb for it. That makes the whole project much more complex and elaborate to just handle it along the way. For that reason I have decided to buy me this smart device and experiment with it: http://www.enterpoint.co.uk/moelbryn/darnaw1.html This one does include everything that is needed and some more and will allow to breadboard the rest of the circuit. Will keep the group informed about any progress of that project. Best regards Ulrich Bangert > -----Ursprungliche Nachricht----- > Von: [EMAIL PROTECTED] > [mailto:[EMAIL PROTECTED] Im Auftrag von Magne Mahre > Gesendet: Freitag, 30. November 2007 14:55 > An: Discussion of precise time and frequency measurement > Betreff: Re: [time-nuts] Of rubidium life and piggy-bank anemia.... > > > Ulrich Bangert wrote: > > Use the three-cornered-hat method to rank your clocks! > > The literature seems to say that you need to do the > measurements simultanously to get good results from the TCH > method. I guess most of us have only one TIC at home, so I > wonder how the results will be affected by taking them one at a time ? > > --Magne > > _______________________________________________ > time-nuts mailing list -- [email protected] > To unsubscribe, go to > https://www.febo.com/cgi-> bin/mailman/listinfo/time-nuts > and > follow the instructions there. > _______________________________________________ time-nuts mailing list -- [email protected] To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
