Ulrich Bangert wrote: > Bruce, > > >> Even a DDS followed by a PLL cleanup loop (10811 plus analog PD etc.) >> should work well although with a binary tuning word obtaining >> an exact >> 10.00001MHz (or alternatively 9.99999 MHz) output isnt >> possible. A DDS has some advantages over a synthesizer using >> dividers in that >> additional noise isnt aliased into the output. >> > > Since I am well familiar with the Analog Devices DDS circuits, this has > been my very first idea. The most simple one for that purpose would be a > AD9851 (180 MHz, 32 Bit, built in clock multiplier). But when I used the > DDS design tool available on the AD web pages I received a big warning > saying that using a "clock X multiplier" frequency that is a near > integer of the output frequency generates lots of unwanted spurs. Which > was new to me since I do so in my GPSDO but should they not know better? > This is why I dropped the thoughts on DDS. > > Best regards > Ulrich Bangert > > Ulrich
Yes, that is a characteristic problem with DDS generators. However it may be possible to remove these spurs by using an OCXO (10811A??) with a narrow electronic tuning range phase locked to the DDS output using a low bandwidth PLL. It depends on how close the spurs are to the desired frequency. Bruce _______________________________________________ time-nuts mailing list -- [email protected] To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
