Dear nuts, I would like to know if there is a clear explanation somewhere with considerations on how to choose an upper frequency limit when integrating phase noise to find jitter. Let's say I'm interested in the raw jitter measurement which comes from integrating phase noise without applying any filter to it. For a given application, I can easily understand that I can define a lower integration limit if the time spans I'm interested in are shorter than some value. For example, we run a synchrotron with a 1.2 second cycle time. Phase noise in our clocks below say 0.1 Hz should be of no concern since it is "common mode" to all the triggers we define within any given cycle using counts of the clock we are characterizing (incidentally I am also interested in your comments on how a phase noise measurement would fare against Allan deviation in this frequency area). I have a bit more trouble with the upper frequency limit. Am I right in saying that the right answer in principle is to integrate to infinity but due to Physics the phase noise will at some offset fmax be so low that the contribution of integrating from fmax to infinity would be negligible? How can I then work out experimentally which is the value of this fmax? Maybe extrapolating the slope of the curve I measure using for example a low bandwidth PLL technique? Thanks for any insight.
Cheers, Javier _______________________________________________ time-nuts mailing list -- [email protected] To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
