Hi Time-nuts people,

I'm new to this forum and really enjoyed reading all the design strategies on 
oscillators.

I'm currently designing a low noise oscillator and I wonder if you can help me 
with some questions. I've attached a picture of the oscillator core I'm  using. 
I decided to go for a Pierce design some time ago after looking at a few 
topologies. I took a number of measures to give the design a low 1/f noise.


 1.  Low DC gain. There is a transformer in the drain line.
 2.  Ultra low noise supply (not on the schematic) using an ad586 buried zener 
reference with a -3dB lowpass at 0.1Hz. This 5V reference is then increased to 
12V using a low noise discrete buffer.
 3.  The phase shift across T1 is only a few degrees (<5degrees), low 
phaseshift in the amplifier reduces 1/f noise.
 4.  I chose a fet in order to minimize the load at the 'output' of the 
crystal, the only load I have now is the bias resistor of 100k. This resistor 
does cause low frequency noise (at higher frequencies C1 shorts it). This may 
be the problem in this circuit, Cgd is modulated by this noise and a low 
frequency voltage is applied at the gate, which is however not amplified 
because of the currentsource in the source line which should cause nearly 
infinite feedback for low frequencies making the DC gain even lower.
 5.  The current source produces low frequency noise. I have to have a current 
source though (I could use a resistor but I calculated that produces more 
noise). I could increase the voltage across R5 and make R5 bigger to reduce the 
noise, however, this will reduce Vgd which means modulation of Cgd becomes 
worse. I think I'm ok here by dividing the voltage across the currentsource and 
the active oscillator element in half. Cgd of a J309 is around 2.5pF at Vds=10V 
(it is a little higher in my case since Vgd is lower)
 6.  L2 can be mounted to accommodate overtone crystals. ( I still have to 
calculate a value for L2 and C2 to get the correct impedance at resonance)
 7.  F1 and F2 are ferrite beads with a low impedance at DC (far less then an 
ohm) and rising impedance at higher frequencies to prevent oscillation of the 
RF transistors.
 8.  I've found a really good overtonecrystal from Citizen. CM309S. I measured 
the unloaded Q to be 313000, the loaded Q (using simple estimation) should be 
around 280000 in the circuit. (C0=2.5pF, R=20Ohm, C1=0.75fF, L=29.444mH, can be 
aquired at digikey). The spec for Rs was <130Ohms, I guess reality is much 
better :-)
 9.  The transformeroutputs are going to an isolationchain using 3 cascodes and 
then a discrete limiter not shown on the schematic.
 10. This whole oscillator core will be placed in an RF shielding can. The 
isolationchain will have a can of it's own to so pulling should be nearly 
eliminated.

Now my questions are:


 1.  I don't see a pierce design in any of the low noise oscillator circuits in 
the discussion threads about low noise oscillator design. Is there something 
fundamentally wrong about this topology?
 2.  I read a few times that ferrites in inductors (and I assume transformers 
as well) can be a real problem for 1/f noise. I'm using a transformer (TC1-1t 
from minicircuits) which is made with a ferrite bead. Do you know of any 
transformers or inductors that have low 1/f noise ferrite material.
 3.  Have I missed something fundamental in the design. The goal is to build a 
very good oscillator. I would like to achieve something like -110dBc/Hz at 10Hz 
distance at 33.8688MHz.

Thanks in advance for having a look and best regards,

Hans Rosenberg

Attachment: temp.pdf
Description: temp.pdf

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