> It appears that the tbolt basic disciplining action is to vary > the DAC voltage to keep minimize the PPS error. Every
Is there a GPSDO that doesn't work this way? > You can also see that the disciplining processes varies the > DAC voltage with temperature. The envelope of the DAC > voltage curve mirrors the temperature curve, but delayed > around 45 seconds (huge changes in the temperature > curve get to the DAC in around 10 seconds). Mark, is there a way to tell if the voltage envelope you see is simply the result of the OCXO frequency changing in response to ambient temperature change? Or is your thought that somehow the OCXO is immune from ambient temperature and the onboard temperature sensor is doing all the work to change the DAC? Do you have parallel runs with both style temp chips? Also are these free-run or GPS locked runs? Maybe the LH plot you attached got cut off; what is the x-axis scale for this plot? How many seconds (or hours?) wide. /tvb _______________________________________________ time-nuts mailing list -- [email protected] To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
