Kit Probably the higher jitter and periodic phase modulation due to simultaneous switching of multiple outputs at different frequencies. The magnitude of the latter will depend on the loads driven by each output.
The cure is to use an external flipflop to resynchronise the outputs to the 10Mhz clock. Bruce Kit Scally wrote: > Bill, > > What's wrong with Tom's (/tvb) PIC divider ? > > http://www.leapsecond.com/tools/PPSDIV.ASM > > Rgds, > > > Kit > > ****************** > > Message: 2 > Date: Sun, 29 Mar 2009 20:28:57 -0700 > From: Bill Janssen <[email protected]> > Subject: [time-nuts] state of the art devide by ten > To: Discussion of precise time and frequency measurement > <[email protected]> > Message-ID: <[email protected]> > Content-Type: text/plain; charset=ISO-8859-1; format=flowed > > I want to construct a divide by ten or a divide by 100 frequency > divider. This is to take my 10 MHz. from my > Rubidium to 1 MHz. or 100 KHz. > I could use the spare 74xx90 chips ( which I have) but I would like to > make some thing useful for future > uses. What would be a "through the hole" type of IC that would have less > > jitter than a 74xx90. I CAN do > surface mount if I have to. > > Thanks > Bill K7NOM > > > _______________________________________________ > time-nuts mailing list -- [email protected] > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. > > _______________________________________________ time-nuts mailing list -- [email protected] To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
