Bruce, > The problem is more accurately described as: > When the bias network dc level at the 74AC04 (or 74HC04) > inverter input isn't equal to the switching threshold of the > particular device then AM modulation on the input signal is > converted to phase noise as switching no longer occurs at the > zero crossing of the input signal. Such behaviour is inherent > when using a Schmitt trigger circuit and it cannot be cured > with a feedback circuit that stabilises the output duty cycle.
In order to generate stable and low noise signals on the 10 GHz microwave band it is common among radio amateurs to multiply the signal of a 106.5 MHx xtal oscillator by 96. Clearly the oscillator's phase noise should be as low as possible due to the multiplication process. If high stability is needed, the 106.5 MHz has to be phase locked to a 10 MHz reference. In "UKW Berichte 4/2003" (VHF Communications) Andre Jamet, F9HX, and Gil Feraud, F5CAU, decribe a circuit in which a 106,5 MHz signal is directly synthesized out of a 10 MHz reference by multiplication, division and addition. With respect to the requested low phase noise at it's output it is interesting to inspect what they use for sine to ttl translation inside. Much to my surprise they use the self-biasing input of phase comparator II of an ordinary 74HCT4046 (with everything else of the pll disabled) for this purpose. I have since then made some experiments on my own which indicate that the 74HC(T)4046 works really good as a sine to ttl translator. For a quick test I use this: A SR620 is started by it's internal 1kHz reference and stopped by the signal under test. Then I let the counter compute the AD over 1000 samples or so. Say I get a reading of X with the reference sine connected to the stop input I get X+Y with the sine to ttl translator inserted after the reference with most if not all circuits that I tried before. However, with a 4046 based sine to ttl translator I get a result of X-Y (!). No no, I am not going to claim that the circuit "improves" the reference's phase noise. I just would like to draw your attention to the fact that the ouput of a sine to ttl translator is influenced by the jitter inherent in the used logic family AND the trigger noise to appear at the translation process at the input. In this sense I would judge the X-Y result so that the 4046's trigger noise @ 10 MHz is better than that of the SR620's trigger circuitry. Best reagrds Ulrich > -----Ursprungliche Nachricht----- > Von: [email protected] > [mailto:[email protected]] Im Auftrag von Bruce Griffiths > Gesendet: Freitag, 3. April 2009 01:29 > An: Discussion of precise time and frequency measurement > Betreff: Re: [time-nuts] time-nuts Frequency Divider > > > Mike > > The problem is more accurately described as: > When the bias network dc level at the 74AC04 (or 74HC04) > inverter input isn't equal to the switching threshold of the > particular device then AM modulation on the input signal is > converted to phase noise as switching no longer occurs at the > zero crossing of the input signal. Such behaviour is inherent > when using a Schmitt trigger circuit and it cannot be cured > with a feedback circuit that stabilises the output duty cycle. > > A well designed limiter + filter cascade in front of the > comparator, Schmitt trigger or logic gate can be used to > minimise such AM to PM conversion whilst minimising the output jitter. > > Bruce > > Mike Monett wrote: > > > Message: 3 > > > Date: Fri, 03 Apr 2009 09:04:59 +1300 > > > From: Bruce Griffiths <[email protected]> > > > Subject: Re: [time-nuts] Frequency Divider > > > > > Hal Murray wrote: > > > > >>> A large resistor connected between the input and > output would > > >>> accommodate threshold variations better. Even better > would be a > > >>> feedback loop that adjusts the input bias point to > maintain the > > >>> output duty cycle at 50%. > > > > >> Isn't that resistor a feedback loop? > > > > >> I played with that setup in the lab many years ago. > It didn't > > >> work as well as I was expecting. I didn't figure > out why it > > >> didn't work better. > > > > >> Maybe some gain in the feedback path would help. Then > we have to > > >> consider stability. Ugh. > > > > > Hal > > > > > Yes, a resistor connected between the input and > output of an > > > inverter is a feedback loop but the loop gain is relatively low. > > > > > With a high amplitude input threshold variations from > the nominal > > > can cause the input protection diodes to conduct. > > > > > Once these diodes conduct the output jitter may > deteriorate > > > significantly (it does for HCMOS inverters). > > > > > Using a non inverting integrator in the > feedback path can > > > accurately stabilise the duty cycle. > > > > > Bruce > > > > The 74HC and 74AC input threshold tolerance is +/- 30%. > This means > > the threshold can vary from 1.5V to 3.5V with a Vcc of 5V. > > > > This limits the maximum input signal to 3V p-p or > +13.5dBm, and > > leads to a very subtle flaw discovered in some amazing > engineering > > work by Martein Bakker, PA3AKE. > > > > If the threshold is not controlled, it can cause AM noise > to convert > > to PM noise and degrade the jitter. This occurs in > the Analog > > Devices AD9910 1GHz DDS chip. > > > > Martein Bakker discovered this in his noise analysis, > and Kevin > > Wheatly gave a nice entry in his blog on how to fix it: > > > > http://www.m0khz.com/?p=589 > > > > Mike > > > > _______________________________________________ > > time-nuts mailing list -- [email protected] > > To unsubscribe, go to > > https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > > and follow the instructions there. > > > > > > > _______________________________________________ > time-nuts mailing list -- [email protected] > To unsubscribe, go to > https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. _______________________________________________ time-nuts mailing list -- [email protected] To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
