However it does discipline the DDS outputs as intended.
It is somewhat akin to Ulrich's approach perhaps without the robust
outlier rejection.
This approach would allow a wide range of relatively stable low noise
sources to be used including those that may have drifted out of
adjustment range.
One drawback for some applications is the relatively high phase noise floor.

Bruce

Lester Veenstra wrote:
> Sync to 1 pps but will not discipline the frequency source
>
>  
> Lester B Veenstra  MØYCM K1YCM
> [email protected]
> [email protected]
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> -----Original Message-----
> From: [email protected] [mailto:[email protected]] On
> Behalf Of christopher hoover
> Sent: Thursday, June 11, 2009 5:26 AM
> To: [email protected]
> Subject: [time-nuts] AD9548 - Clock IC Generates Up to 400 MHz from 1 PPSGPS
> Signal
>
>
> [fyi -- this may be of general interest, but n.b. that this A.D. 
> marketing - ch]
>
>
> Clock IC Generates Up to 400 MHz from 1 PPS GPS Signal
>
> The AD9548 
> <http://www.analog.com/en/clock-and-timing/clock-generation-and-distribution
> /ad9548/products/product.html> 
> is the first clock chip in the industry to directly generate up to a 400 
> MHz output clock, with extremely low phase noise, that is locked to a 
> standard one pulse-per-second (PPS) GPS clock signal. This performance 
> is a result of combining Analog Devices' proprietary direct digital 
> synthesis (DDS) technology with a state-of-the-art digital phase-locked 
> loop (DPLL). Other solutions for synchronizing to the GPS 1 PPS source 
> typically rely on one or more frequency upconversion steps. Maintaining 
> low output noise, while providing over eight orders of magnitude of 
> frequency scaling (1 Hz input to over 100 MHz output), is a significant 
> challenge. The AD9548 is able to mitigate this effect thanks to a 
> digital loop filter capable of bandwidths as low as 1 MHz (10 Hz to 3 Hz).
>
>
> /
> /
>
>
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