Ulrich,
Ulrich Bangert wrote:
Magnus,
Indeed, but too narrow pulses may still be a problem. The
benefit of a continous signal is that the disturbance can be
kept at a high frequency and thus be dampend out and the
channel capacity for corrections is maintained high.
I have no clue to what you are refering to. Narrow pulses? What narrow
pulses? Continous signal? What continous signal? The AD9901 circuit uses the
flip-flops only in case that there is still a frequency error between the
inputs. Once this frequency error is removed by the loop the circuit works
as if only the XOR were present. Which makes this circuit exactly an very
intelligent and versatile steering device: Frequency comparator if necessary
and XOR phase comparator if possible.
I can't recall all details about all devices, OK?
I think I saw the datasheet of AD9901 a few years ago, and my attention
was on other details.
XOR is good for continous phase-tracking if you are able to maintain
within +/- 90 degrees. Tracking into that condition is another thing.
Assuming good signal. XOR degrades to multiplication as noise is added,
with the associated change in phase detector gain. But for such good
signal/noise ratios as we have in this case, such concerns about it
should not be excessed.
Otherwise I prefer the S/R FF, which gives a +/- 180 degrees response
and has the phase/frequency property, so it always tracks in. You can
build a safe S/R FF from a 74AC00. Very simple and good track-in
properties. Combine with favorite active loop topology and you are ready
to go.
You can do alot of tricks in a CPLD. Getting the basic plot
of what is good or bad system design still needs to be sorted
out. Not meant as criticism, but just as a kind warning.
Sure! I had better said: Due to the simple design and the very good
performance of this phase/frequency comparator I use it as a standard in all
my PLL designs. Since I usually do not need the high frequency capabilities
of the original AD9901 but need only performance up to a few MHz I do not
buy the original part from AD but have covered the circuit diagram into a
number of cplds. These have proved to work so well in a number of PLLs for
different purposes that I can recommend you to do the same from my very own
experience.
Ah, now that is a good point.
Cheers,
Magnus
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