My fear is "in the loop bandwidth" is a lot of BW
as I need a wide loop for it to be fast.
Okay, it sounds a nice path to investigate.
tks.
lc
Lux, Jim (337C) wrote:
On 10/15/09 5:56 AM, "Luis Cupido" <cup...@mail.ua.pt> wrote:
Hi Bert,
Thanks for the input.
briefly;
-Phase noise is not too important
-It is to make just a few (and cost is not a major issue)
The suggestions using prescalers or any other high speed
digital chips may bring simplicity while compared with
the design using multiple loops and harmonic mixers and samplers
that is something I had in mind when I place the question out.
I was wondering if recent technology would make possible
to have a simpler approach.
I like your first suggestion but I fear the spurious...
I have no clue how bad it will be, but I guess I can only
be sure if I make a prototype of that.
The second one I must check how small would be the step...
1 MHz would be enough for a start.
The spurs might not be as bad as you think... The newer crop of DDS include
some forms of error cancellation for close in spur reduction, so the "in the
loop bandwidth" part is cleaner. Also, maybe you can use clever choice of
DDS clock rate to make sure that you only need "nice" phase increments that
evenly divide into the lookup table length.
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