Lots of fun little details to worry about managing....
ws) TOO True.
A temporary attenuator bypass switch or syncing at a higher freq are two of
many ways to help the initial lock up delay caused
when a high value Dac attenuator is used to lower the effect of EFC noise
and / or to increase the Loop TC without needing large Capacitors.
**
This reminds me of a couple of unconventional Tbolt setting that have been
useful for me.
(Mostly applies ONLY to advanced Tbolt users that like to tweak things)
#1) Along with setting the "initial Dac voltage" to the nominal Dac out,
ALSO
Set the "Min & Max Dac Voltages" to 0.100 mv or so below and above the
nominal Dac output voltage.
(or more than +- 100mv if your Osc is still drifting lots)
Reason:
Although these setting have NO effect under normal operation, every once in
a while,
I'll set something wrong (like Dac gain to the wrong polarity) and the
control loop will Drive the DAC voltage way off.
What I have seen is IF the EFC voltage is given a large temporary voltage
change,
it can (will) cause a small Freq offset to occur even after the Dac is
returned to its previous voltage.
This offset can then take a long time to recover, similar to cycling the
power.
Clamping the Dac level helps that from happening by limiting the max EFC
voltage change.
#2) Set the Tbolt to the "single Sat mode and the Sat number to "00" (two
zeros)
(Note, ONLY applies to units with a poor antenna signal)
Reason:
IF you have a poor antenna view caused by things like an indoor antenna or a
partial blocking of signal in one or more directions,
That will cause excess Osc noise as the low level satellites switch in and
out.
In the "single sat / double zero" mode, the Tbolt will only use the highest
Sat available.
This causes less satellite switching noise, but then there is only one
Satellite at a time to average.
Always that trade off.
What I've seen is for poor antenna signals the single sat mode can help Osc
and phase noise about two to one,
For the average and good antenna signals the single sat mode hurts by two to
one or more.
ws
**************
From: "Bob Camp" <li...@cq.nu>
Subject: Re: [time-nuts] GPSDO Design
Hi
If you fire up a conventional 1 pps loop with 10 ppb tune range, it's
going
to take it a while to track out any initial error. The most it can move by
is +/-5 ns per second. You probably don't want to wait a year for it to
catch up with a 158 ms initial error.
Lots of fun little details to worry about managing....
Bob
*****************************
Subject: [time-nuts] GPSDO Design
John ask
Translating nV/sqrt(Hz) to something
practical is basically the assistance I'm looking for here.
I would appreciate anyone being able to teach me a bit more about this.
If that is ALL you want to know, That's easy and quick.
For this application sounds like you already know ALL you need to know
about
that, nothing.
Putting a 1 sec or so RC filter at the EFC input, takes care of all that
AND
if you want it even better,
and to get the long Control loop time constants needed, JUST reduce the
(loop) gain, don't need no BIG caps.
That is attenuate the output of the control amp by typically a hundred to
a
thousand instead of multiplying by 1.6 and add a fixed, adjustable,
stable,
offset source. (electrical or mechanical)
The Buffer amp is not going to be your problem.
ws
************
[time-nuts] GPSDO Design
John Foege john.foege at gmail.com
Hi All,
Quick question for the more experienced members here with GPSDO
design/operation. Let's assume I'm using a 4096 phase comparator chip
followed by some kind of long time constant lowpass loop filter,
whether it be analog or digital, is not of concern for the following
question.
Obviously using a 74HCT4096 would mean that my EFC voltage range would
be approx. 0-5V. If I wanted to use an OCXO with say a 0-8V EFC
voltage range, then I would be inclined to simply use an op-amp
amplifier with a gain of 1.6 to scale the EFC voltage accordingly.
But not just any op-amp would do I take it? High-speed would of course
be of no concern. Also low-offset would be of little concern, as the
PLL would work to correct this, and it therefore seems to be
negligible. However, the part that's got me thinking is noise.
Obviously any noise at the ouput of the amp would adversely affect the
frequency stability of the OCXO.
I thought the best way to control this would be to use an extremely
low noise op-amp employing a rather large compensation cap to give me
a rather small bandwidth, perhaps only a few hundred hertz.
Anyone have experience with this? Assuming I have an OXCO with a max.
pulling range of 1ppm or 1e-6 over a 10V range, then I effectively can
pull 1e-7 per volt. This translates to 1e-10 per millivolt and 1e-13
per microvolt. Assuming that is a logical conclusion, then for a good
OCXO, in which I can at best hope for 5e-12 stability for tau=1s (e.g.
HP10811A), I would strive to to keep the noise at such a level that it
is an order of magnitude better than the best short term stability
figure. Accordingly, then I should shoot to keep any noise under 1
microvolt?
I don't have much experience with noise calculations. I know it is
specified in nV/sqrt(Hz) generally. Translating this to something
practical is basically the assistance I'm looking for here.
I would appreciate anyone being able to teach me a bit more about this.
Thank you in all in advance.
Sincerely,
John Foege
**************
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