> There is another way to compare two frequencies, relevant when they are > very close together. I divide a reference down to 100KHz and use it to clock > a phase detector made of a pair of D flip flops. The unknown (divided to > 100KHz) is fed into the circuit and an output that is proportional to the > phase difference appears on the output as a changing mark-space ratio.
I like it. Thanks. How did you pick 100 KHz? > Using CMOS and a precise power supply (because under no load, CMOS > output is precisely rail to rail), the averaged output (100ms RC filter) is > fed to a strip chart recorder. Has anybody checked the edge cases and/or linearity of a setup like this? > The recorder shows the changing phase difference and folds back each time > a whole cycle passes. A 12 bit analog data logger resolves 2.5ns of phase > and gives data for further analysis. Is 2.5 ns good enough? What would you gain by using a 16 bit DAC? If 2.5 ns is good enough, I'll bet you can do the whole thing in digital logic. Just get a fast FPGA/CPLD. I haven't done a serious design, but a quick check at some old data sheets shows it's not silly. You could probably bump it up by another factor of 2 with some external (p)ECL chips. -- These are my opinions, not necessarily my employer's. I hate spam. _______________________________________________ time-nuts mailing list -- [email protected] To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
