Instead of copying the Shera controller albeit with higher resolution
its probably more cost effective to choose a microprocessor with built
in time stamping capability.
The PIC24FJ128GA for example allows 30ns timestamping resolution via its
external timer capture inputs.
Other microprocessors (or DSPs) are available with even higher
timestamping resolution.
Since modern GPS timing receivers can have a timing noise of a few ns
(after sawtooth correction) it may also be useful to use a simple time
to digital converter (eg TAC + ADC) to achieve a resolution of 1ns or so.
Several microprocessors have built in ADCs with sufficient resolution
and low leakage to allow trimpots, external buffer opamps etc to be
dispensed with.
The trimpots being replaced by interleaved software calibration.
The microprocessor initiates a TAC calibration cycle after each external
PPS event is timestamped.
The resultant sequence of calibration coefficients can then be filtered
and used to correct the PPS fine time stamp sequence.
If the microprocessor also has a couple of PWM outputs then these can be
used to implement a high resolution synchronously filtered DAC
The synchronously filtered DAC requires a stable reference, a couple of
opamps, a few analog switches plus a few resistors and capacitors.
Neither the resistors or capacitors need to be extremely close tolerance
parts.
Bruce
[email protected] wrote:
What could you help with? Bert
In a message dated 7/28/2010 3:05:26 P.M. Eastern Daylight Time,
[email protected] writes:
Bert,
I for one, would be interested in that.
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