Cheers,
Magnus
One still has to ensure that close in spurs generated by the DDS sources
aren't an issue.
If the zero crossings of the beat frequency signals at the outputs of
the 2 final mixers arent closely aligned then such spurs can be
problematic.
How close in for the spurs?
For most DDSes the spurs come from phase truncation errors, and to a
lesser extent from harmonics aliased into the passband. There's a
couple ways to reduce this for basically fixed frequencies.. You can
drive the DDS clock from a variable frequency source (e.g. another PLL
or DDS) so that the frequency you're generating doesn't have spurs in
"bad" places. Another approach is to do your DDS with a FPGA/DAC, and
make the phase accumulator and sin/cos LUT not a power of 2 long.
And finally, there's all kinds of clever ways to suppress close in spurs
with things like error feedback.
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