Bruce Griffiths wrote:
Bruce Griffiths wrote:
Magnus Danielson wrote:
On 27/01/11 14:33, jimlux wrote:
A problem with using a 2^(n-1) < N < 2^n is that the phase-sequence
will run short compared to the usual binary bits taken from the top
of the DDS, so this will needs to be handled. It takes some extra
tricks to avoid the phase-jump and hence sawtooth phase modulation.
The AD9913 (when operating in the variable modulus mode) merely adds
an extra 1 (lsb) to the main accumulator whenever the auxiliary
(variable modulus) accumulator overflows.
Thus to avoid phase modulation of the output the combined result of
the 2 accumulators has to result in the main accumulator always
having zeros in the lower b-p bits where p is the width of the
truncated phase word and b is the width of the main accumulator.
More precisely the phase truncation error must be constant (ie the
phase truncation error, the least significant b-p bits of the main
accumulator should always have the same value).
This requires that the auxiliary accumulator overflow every cycle and
the ls p-b bits of the main frequency tuning word have the value
2^(p-b) -1.
And the auxiliary accumulator needs to overflow on every cycle (if thats
possible).
ie using the auxiliary accumulator doesnt add any extra phase
truncation spur free frequencies compared to those available when only
the main accumulator is used.
Thus although using the auxiliary accumulator may allow frequencies
like 10MHz - 10Hz to be generated from a 100MHz DDS clock they will
not be phase truncation spur free.
Cheers,
Magnus
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Bruce
Bruce
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