Thanks for the info Fred The problem is the package. Looking at the Cirrus Logic CS 2300-CP and use a bubbler. Since I start out with 5 or 10 MHz there must be something out there that can be soldered. In a message dated 2/25/2011 7:17:42 A.M. Eastern Standard Time, [email protected] writes:
Hello Bert, That rationale sounds suspiciously familiar. The quest for an ever simpler VCO, that is. At the expense of some additional phase noise compared to VCXO+PLL, you could use an ADF4360-9. It is readily available at for example digikey, currently for $6.26. For my fpga based counter project I had pretty much the same thing as what (I think) you are doing. Simplify it wherever possible... So first use a PLL with integrated VCO, and see if the phase noise/jitter is not the limiting factor to your performance. If it turns out to be limiting, you can always do the more complicated VCXO + PLL + loop filter later. Anyway, that ADF4360-9 suggestion is working under the assumption that you are feeding it something like a 5 or 10 MHz reference signal. And it also assumes you don't mind QFN packages. You know, the little buggers with 0.5 mm pitch and no pins. regards, Fred "Bert Kehren" wrote: > As part of the D/M project the counter uses a 100 MHz VCO with an AD 4001 > PLL. To simplify further I would like to consider a very simple VCXO, easily > available components, no tuning, any ideas out there. For once phase noise > is of no concern. _______________________________________________ time-nuts mailing list -- [email protected] To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. _______________________________________________ time-nuts mailing list -- [email protected] To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
