Lets see feb to june. Time to restart this thread. I found this a very interesting thread and finally ordered the transformers from mini circuits. Needed some other parts and had enough of an order to make sense. I do plan to build the circuit and try some of the comments suggested to see what happens. Though this may take a bit of time. Lots of other things to work on. Regards Paul WB8TSL
On Wed, Feb 16, 2011 at 9:11 AM, paul swed <[email protected]> wrote: > This has been a great read. > Though I don't have a need at the moment. I may assemble this with the > various comments just to try it out. Dead bug style. > Regards > > > On Wed, Feb 16, 2011 at 8:46 AM, Paramithiotti, Luciano Paolo S < > [email protected]> wrote: > >> >> Bruce, >> I have collected yours comments, I hope they will be usefull for my next >> doubler version. >> A question: do you have ever made a physical doubler like this? if so, can >> you show us the schematic, photos and results of measurements made? >> >> Luciano >> >> Luciano P. S. Paramithiotti >> >> >> >> -----Original Message----- >> From: [email protected] [mailto:[email protected]] On >> Behalf Of Bruce Griffiths >> Sent: martedì 15 febbraio 2011 22.19 >> To: Discussion of precise time and frequency measurement >> Subject: Re: [time-nuts] Advanced 5 to 10 MHz doubler >> >> Simulation using LTSpice confirms that the 2N3904's actually saturate in >> this circuit. >> The phase noise performance will be poor. >> The transistor conduction angle is also poorly defined and significant >> conduction overlap due to saturation may render the circuit ineffective at >> high frequencies. >> >> The attached circuit schematic using a 1:4 (impedance ratio) input >> transformer will work much better and has a relatively well defined large >> signal input impedance. >> The output filter can be elaborated by replacing the 80pF caps with a >> combination of series tuned LC traps and a smaller shunt capacitance to >> reduce the level unwanted components. >> Suitable 100uH inductors (with SRF > 20MHz) are readily available from >> Farnell/element14. >> The output impedance is relatively low and a better match to 50 ohms may >> be achieved by adding a suitable low phase noise output buffer amp stage. >> Alternatively a 4:1 impedance ratio transformer can be used at the >> collector node with its primary shunted by a 200 ohm resistor. >> >> Any balancing circuitry (should this be necessary) should be implemented >> at the BJT emitters as any attempt to do this at the collectors will be >> ineffective. >> >> Bruce >> >> Bruce Griffiths wrote: >> > Paramithiotti, Luciano Paolo S wrote: >> >> http://www.timeok.it/files/5_to10_mhz_advanced_doubler.pdf >> >> >> >>> This design appears to have gone somewhat astray. >> >>> high impedance unless of course the transistors enter saturation in >> >>> which case the phase noise performance will be severely degraded. >> >>> The best place for a balance adjustment circuit is actually in the >> >>> emitter circuit. >> >> *The collector balancing work correctly and is more simple to >> implement. >> >> >> > I contend that the collector balancing technique you use only works >> > because the doubler isn't operating correctly. >> > With a high impedance collector output it would be relatively >> > ineffective unless the balancing resistance is increased to a level >> > that degrades the phase noise performance or saturation occurs. >> >>> The description of the biasing is misleading in that the actual bias >> >>> level that sets the crossover current is determined by the signal >> >>> dependent voltage>across the two 0.1uF capacitors in the emitter. >> >>> With a 1:1 input transformer the quoted figure of 35 ohms for the >> >>> input impedance seems excessive for large signal operation of the CB >> >>> stages unless of>course they saturate. >> >> *the input impedance is 35 Ohms @ 0dBm as measured with network >> >> vector analyzer. It can be upgraded to 50 ohms adding resistance on >> >> emitters, with some gain reduction and probably less phase noise. I >> >> will do some modification in the next future, including an input 6 >> >> Mhz low pass filter. As you know, the input signal have to be pure >> >> sinewave to avoid unsymmetrical positive and negative half wave and >> >> obvious unbalaced output and high harmonics contens. I will test also >> >> the common emitter configuration to better isolate the doubler from >> >> the input impedance and level variations. Regarding the input level I >> >> have setup it's range, as my personal standard,from +7 to +13 dBm. >> >> >> > I thought as much, the large signal input impedance (this is far more >> > important than the small signal value) will be much lower. >> > Since the bias shifts with input signal level the small signal input >> > impedance that you measured is of little value. >> > >> >>> It would also appear that the 20MHz tank 5.6uH + 12pF as drawn is >> >>> inappropriate in that it inevitably leads to saturated operation. >> >>> A series resonant 20MHz tank from the collector node to ground would >> >>> be a better choice. >> >> * The LC on collector is to adapt the impedance between the doubler >> >> and the filter and to cut the higher harmonics. The filter itself >> >> contain trap for 15 20 and 30 Mhz. >> >> >> > Maybe so, but the filter input topology adopted is inappropriate for >> > low phase noise and avoiding saturation. >> > Attempting to match the (poorly predictable and varying - with >> > temperature and input signal level) collector output impedance to the >> > filter input impedance is misguided, just treat the output as a high >> > impedance source. The 4:1 (impedance ratio) output transformer should >> > suffice, if necessary you can add a 200 ohm resistor in shunt from the >> > collector node to Vcc if you need a 50 ohm output impedance. In >> > practice it may be better to buffer the output with a series >> > transformer feedback stage with well defined output impedance. Series >> > resonant LC traps from the doubler collector node to ground should be >> > more effective than parallel resonant series traps in that the high >> > frequency component amplitudes at the doubler collector will be >> > significantly reduced rather than enhanced by the filter. >> > >> >>> A snapshot or even a sketch of the collector voltage waveforms would >> >>> be useful in showing that the transistors saturate or not. >> >> *Actually the prototype is gone to friend's home and I cannot do any >> >> more measure on it. My next prototype's pubblication will be complete >> >> of collector voltage waveform to better understand the working >> >> condition of the doubler stage. I think the 2N3904 is not the best >> >> solution, i will test some more devices and bias point. >> >> >> > At 10MHz you will find that most wideband transistors will be noisier. >> > However using transistors with a lower base spreading resistance than >> > the 2N3904 may be useful. >> >> Thank you >> >> Luciano >> >> >> >> note: I'm not a genius, I just try to enjoy myself. If someone follow >> >> me, is at his own risk. >> >> >> >> >> >> >> >> Luciano P. S. Paramithiotti >> >> >> >> >> > Bruce >> > >> > >> > _______________________________________________ >> > time-nuts mailing list -- [email protected] To unsubscribe, go to >> > https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >> > and follow the instructions there. >> > >> >> >> _______________________________________________ >> time-nuts mailing list -- [email protected] >> To unsubscribe, go to >> https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >> and follow the instructions there. >> > > _______________________________________________ time-nuts mailing list -- [email protected] To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
