On Wed, Jun 29, 2011 at 10:54 AM, Hal Murray <[email protected]> wrote: > >> How does the pulse trigger the capture ? If some hardware line is polled, >> how frequent is that polling ? The counter units may well be nanoseconds, >> but the inherent uncertainty of the polling instant must be taken into >> account. > >> If instead there is no polling, but it is a hardware triggering, then could >> you please give more details ? Thanks.
The hardware design dates from the old IBM PC in the 1980's The pin on the serial port (and one on the old Parallel printer port) is tied to a CPU interrupt line. The micro-code inside the Intel chip polls this is very high rate, roughly a few GHz. (Actually we don't know if it is microcode or clocked logic and it may depend on the exact CPU model.) The interrupt jumps to a small bit of code inside the Kernel. This code reads a hardware counter. The count is saved and the units are ns. But acuracy is not at the ns level. But is certainly at the sub us level. I suspect all of this happens MUCH faster then you could implement using 7400 series TTL logic. The 5ns gate delay of a TTL chip is an "eternity" for a modern CPU. Even for me who works with computers all the time it's hard to imagine a CPU that can issue multiple instructions per cycle with a cycle rate over 3GHz. and I've got eight of those processors inside this computer. The user level program does not need to run in "hard" real time, it only has the read each time tag before the next tag is saved. The tags are sequence numbered so the user program can see if it missed a tag so missing one is not a serious error. I don't know the final level of accuracy but NTP uses the same system for the pulse per second ref. clock and if you take care it can run at about the 1uS level with respect to UTC. Top do better I think you'd need to use one of the HP Universal Counters and a GPIB interface or maybe the "Pic Tic II" to measure zero crossings. Or maybe some one can build a counter that runs off a 10MHz lab standard. But Pic Tic seems to have already do this. So I'd say if 1uS is not acceptable then use the external counter Again, what are the requirements? Can't evaluate a proposed design with out knowing what we are looking for. Chris Albertson Redondo Beach, California _______________________________________________ time-nuts mailing list -- [email protected] To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
