On 4/7/12 4:47 AM, Javier Herrero wrote:
El 07/04/2012 13:19, Azelio Boriani escribió:
The Xilinx and Altera have their embedded CPUs (Microblaze and Nios) IP.
I'm not familiar with them and don't know how much they cost. Until now I
have developed on Xilinx 50Kgates FPGA and 128 cells CPLD with the
Xilinx's
free tools.
Mostly expensive for amateur use, although reduced free versions exists
(for Nios-II it is Nios-II/e without MMU and no cache, I suppose that
something similar for Microblaze). But both are closed-source.
There are open-source soft processors like LatticeMico32 and LEON3. I'm
moving to one of these for a next project (not yet decided which one,
since in this case it will be a bare-metal application, with no
operating system, but I would like to use a processor that is supported
by Linux distribution for the future). Linux is ported to both, and for
LM32 (not sure if for LEON3), RTEMS also (see www.milkymist.org , an
open source hardware and software project with an LM32 implementation on
a Spartan 6 FPGA using RTEMS. Also there is a plethora of soft
implementation of several processors in OpenCores (ranging from 6502 to
OpenRISC) and also somewhere I read about an implementation of a Cray-1
in a Spartan-3 :)
I'm very familiar with the LEON and RTEMS, having managed a software
development project with it for the last 3 or 4 years at work.
http://www.gaisler.com/ for LEON
http://www.rtems.org/ for RTEMS
And yes, there is a port (maybe two) of Linux for the LEON as well (A
few years ago, we loaded up the Snapgear port, but since we went RTEMS,
I haven't fooled with it). You'd have to check the Gaisler.com website.
You can drop a LEON core into a Virtex II in about a day, and judging
from the traffic on the LEON yahoo list (where the Gaisler folks hang
out), lots of people are doing things like multiple cores and things on
all manner of Xilinx eval boards.
Gaisler's GPL library of assorted cores (pretty much all using AMBA)
make life pretty easy from a hardware interface standpoint. Their basi
strategy is that source and documentation is free, but that if you want
the fault tolerant versions, or the versions intended for spaceflight,
or the testbenches for the cores, you have to go with a license ( a few
thousand bucks per core, depending on what it is).
Gaisler's basic business model (hopefully I'm summarizing correctly..)
is that they do custom FPGA/ASIC designs for people, putting together
pieces of their library, possibly adding new modules, targeted to
platforms like the Actel AX2000 (or Xilinx, or FPGA->ASIC). SO you have
products like the Atmel AT697 (A LEON-FT with memory controllers and
peripherals) which we use in JPL's space radios) or the Aeroflex UT699
(another LEON core with various peripherals).
RTEMS wise... It's pretty well supported by the community, it's open
source, it does all the stuff you want a RTOS to do. it's NOT a
multitasking, dynamic loading OS like Linux. That is it doesn't support
an MMU and process space isolation (although that might be possible in
newer versions.. there's a lot of configurability). It's basically a
statically linked single task with threads. They've got RAM (and disk)
file systems, IP stacks, a shell, YAFFS, etc.
Like all open source, there's quite a lot of interesting stuff available
(not from rtems.org, but others) that is 90% complete. Somebody at
Google Summer of Code or for their Masters decides to implement
something cool, and gets most of the way done, then wanders away (the
summer ended, they got their degree, the usual story).
But there's also a core of users who are serious and rigorous and
contribute back, so the main stuff in the distribution from Joel
Sherrill at OAR (who make RTEMS) is pretty rock solid.
ESA has several rigorously verified flight qualified versions of RTEMS
(in Portugal and Austria, as I recall)
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