The trick here is the 50% divide-by-5, as you can see rather strange but needed for the XOR.
On Fri, Jul 6, 2012 at 11:14 PM, Azelio Boriani <[email protected]>wrote: > OK, here the VHDL of the 24.576MHz synchronizer: > > > LIBRARY IEEE; > USE IEEE.std_logic_1164.ALL; > USE IEEE.std_logic_unsigned.ALL; > ENTITY FRSync IS > PORT (ClkIN, RefIN: IN std_logic; -- ClkIN is 24.576MHz/1536->16KHz, RefIN > is 10MHz/625->16KHz > PWMOut: OUT std_logic); > END ENTITY FRSync; > ARCHITECTURE Proc4 OF FRsync IS > SIGNAL Cnt5A: std_logic_vector (2 downto 0); > SIGNAL Cnt125 std_logic_vector (6 downto 0); > SIGNAL Cnt768 std_logic_vector (9 downto 0); > SIGNAL Cnt2, Cnt5B, Cnt125N, Fr625: std_logic; > BEGIN > -- Dividers section > Div125: PROCESS -- Divide the 10MHz first by 125 then by 5 > BEGIN > WAIT UNTIL RefIN'EVENT AND RefIN='1'; > IF Cnt125="1111100" THEN > Cnt125<= (OTHERS=> '0'); > ELSE > Cnt125<= Cnt125+1; > END IF; > END PROCESS Div125; > Div5A: PROCESS > BEGIN > WAIT UNTIL Cnt125(6)'EVENT AND Cnt125(6)='1'; > IF Cnt5A="100" THEN > Cnt5A<= (OTHERS=> '0'); > ELSE > Cnt5A<= Cnt5A+1; > END IF; > END PROCESS Div5A; > Div5B: PROCESS > BEGIN > WAIT UNTIL Cnt125N'EVENT AND Cnt125N='1'; > Cnt5B<= Cnt5A(1); > END PROCESS Div5B; > Div768: PROCESS -- Divide the 24.576MHz first by 768 > BEGIN > WAIT UNTIL ClkIN'EVENT AND ClkIN='1'; > IF Cnt768="1011111111" THEN > Cnt768<= (OTHERS=> '0'); > ELSE > Cnt768<= Cnt768+1; > END IF; > END PROCESS Div768; > Div2: PROCESS -- Then by 2 for a total of 768*2 -> 1536 > BEGIN > WAIT UNTIL Cnt768(9)'EVENT AND Cnt768(9)='1'; > Cnt2<= NOT Cnt2; > END PROCESS Div2; > -- Combinational section > Cnt125N<= NOT Cnt125(6); > Fr625<= '1' WHEN Div5A (1)='1' OR Div5B='1' ELSE '0'; -- 50% divide-by-5 > PWMOut<= Fr625 XOR Cnt2; -- The XOR needs exactly a 50% duty cycle > END ARCHITECTURE Proc4; > > > On Fri, Jul 6, 2012 at 9:40 PM, Tristan Steele > <[email protected]>wrote: > >> Another option is to do it yourself, it is one of my projects that is >> currently in progress. I have some early information at: >> >> http://electronics.ozonejunkie.com/category/electronics/time/10mhzaudio/ >> >> I am aware that the jitter will not be all that low, but I was more >> interested in longer term stability. I have since made a smaller, neater >> board that just needs to go through some testing. If there is interest, I >> can post schematics up in the next few days. >> >> Tristan >> >> On 06/07/2012, at 20:13, [email protected] wrote: >> >> > I'd suggest hacking USB type soundcards. It is certainly easier to get >> at the guts. >> > >> > There is a Chinese card peddled by a few vendors on ebay that comes in >> a blue metal case. You can slip out the PCB. The card uses CMedia chips. >> > >> > This is the first one I spotted on ebay: >> > >> http://item.mobileweb.ebay.com/viewitem?itemId=280506784055&cmd=VIDESC&index=19&nav=SEARCH&nid=33879388392 >> > >> > I have an older version. These CMedia based cards work well under ALSA. >> > >> > >> > _______________________________________________ >> > time-nuts mailing list -- [email protected] >> > To unsubscribe, go to >> https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >> > and follow the instructions there. >> >> _______________________________________________ >> time-nuts mailing list -- [email protected] >> To unsubscribe, go to >> https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >> and follow the instructions there. >> > > _______________________________________________ time-nuts mailing list -- [email protected] To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
