> Both edges of the 24MHz clock gating pulse are asynchronous with respect > to the signal being gated. > Metastability can result with clock pulse widths that lie within a > critical range. > > Bruce
I don't disagree with your statement above, but my question was -- does it matter in a GPSDO; does it matter in this GPSDO? Occasionally missing a 24 MHz tick is a not a worry (all gated frequency counters share this "feature"). A one-count ambiguity is normal and expected, even welcome. Note also that the PIC will see only 0 or 1; there is no metastability in software. So where exactly is the problem? For educational purposes if nothing else, I'm looking for a precise description of the scenario (at the picosecond level if necessary) that reveals the flaw in his board. I'm not saying there isn't; I'm just saying I'd like to see it explained. Either his design was accidentally or intentionally clever, or there is in fact a minor fault. However, if there is a flaw, we also need to explain why in 15 years no one has reported glitches in their Shera boards. I sort of understand metastability, but just adding more hardware to reduce it doesn't seem to be the only way to deal with the issue in a GPSDO. Said -- how do you handle this in your Fury design? /tvb _______________________________________________ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
