Hi

Not all semiconductor processes are created equal. In order to get things going 
faster you change things around. Past a point, those same changes negatively 
impact the leakage and 1/f noise corner. When all the changes happen, the 
jitter goes up. That turns it very much into a "test it and see" sort of thing. 
You can not just pick the device off a data sheet. 

Bob

On Aug 21, 2013, at 4:44 PM, Ed Palmer <ed_pal...@sasktel.net> w

> Since you're looking for rise times in the low or sub nanosecond range, why 
> wouldn't you include any logic gates where such rise times are inherent?  I 
> was thinking of maybe a chain of faster and faster logic gates.  For example, 
> Potato Semiconductor - no, I'm not making that up - PO74G04A has a risetime 
> of < 1 ns and, if you can keep the load capacitance low enough, a maximum 
> input frequency of > 1 GHz.
> 
> Always trying to learn....
> 
> Ed
> 
> On 8/20/2013 11:28 PM, Bruce Griffiths wrote:
>> The same analysis applies however one would probably use something like 
>> cascaded longtailed pairs with well defined gain (series emitter feedback) 
>> and the low pass filter cap connected between the collectors rather than 
>> opamps.
>> 
>> Bruce
>> 
>> Ed Palmer wrote:
>>> Does anyone know if this situation would benefit from doing something 
>>> similar to a 'Collins Hard Limiter' i.e. instead of squaring the signal in 
>>> one stage, use maybe two or three cascaded stages with increasing 
>>> bandwidths? Normally, Collins limiters are used with beat frequencies of 
>>> less than 1 KHz, but maybe there's value in doing at typical time-nuts 
>>> frequencies.
>>> 
>>> Any thoughts?
>>> 
>>> Ed
>>> 
>>> 
>>> On 8/20/2013 10:02 PM, Said Jackson wrote:
>>>> Hi Ed,
>>>> 
>>>> For anything up to about 150MHz try the NC74SZ04 types from National if 
>>>> you can find them NOS. they stopped making these years ago.. Fairchild is 
>>>> ok too but not as fast from what I have seen.
>>>> 
>>>> Forgot I wrote about it in 2009. Oh boy -age kicking in.
>>>> 
>>>> Bye,
>>>> Said
>>>> 
>>>> Sent From iPhone
>>>> 
>>>> On Aug 20, 2013, at 20:17, Ed Palmer <ed_pal...@sasktel.net> wrote:
>>>> 
>>>>> Hi Said,
>>>>> 
>>>>> Yes, I saw your message from 2009 where you warned about the sine waves.  
>>>>> That's why I was watching for it.  Thanks for the warning.  I also 
>>>>> realized that a DC Block and a 10 db attenuator makes a very nice TTL or 
>>>>> CMOS to Wavecrest converter for anything except 1 PPS which would need 
>>>>> about 15 db.  I tried an old circuit that uses an MC10116 ecl line 
>>>>> receiver - it's actually a dead Racal Dana 1992 counter where I'm using 
>>>>> the processing on the external reference input to square up the signal.  
>>>>> It gives me a slew rate equivalent to about a 50 MHz sine wave.  It 
>>>>> helped a lot, but not enough.  I'll try a 74AC04 and a BRS2G Differential 
>>>>> Line Receiver (risetime < 3ns, 400Mbps throughput).  Both are in my 
>>>>> junkbox.
>>>>> 
>>>>> Ed
>>>>> 
>>>>> 
>>>>> On 8/20/2013 8:12 PM, Said Jackson wrote:
>>>>>> Guys,
>>>>>> 
>>>>>> The dts needs to be driven by square waves, driving them with sine waves 
>>>>>> gives jitter values that are displayed significantly too high due to 
>>>>>> trigger noise.
>>>>>> 
>>>>>> Holzworth makes a small sine wave to square wave converter that can 
>>>>>> drive 50 ohms. Use a DC block and an attenuator on the cmos output to 
>>>>>> avoid damaging the dts inputs. You can make your own converter using a 
>>>>>> single fast cmos gate, resistor, and blocking cap. By using 
>>>>>> hand-selected gates I was able to achieve less jitter with that circuit 
>>>>>> than what the Holzworth box was able to achieve.
>>>>>> 
>>>>>> Doing that conversion can bring down the measured rms jitter on a very 
>>>>>> good 10MHz sine wave source from 10ps+ to less than 2ps - basically at 
>>>>>> or below the noise floor of the dts.. Once you run at the units' noise 
>>>>>> floor, you know your source is quite good..
>>>>>> 
>>>>>> Bye,
>>>>>> Said
>>>>>> 
>>>>>> Sent From iPhone
>>>>>> 
>>>>>> On Aug 20, 2013, at 18:51, Ed Palmer <ed_pal...@sasktel.net> wrote:
>>>>>> 
>>>>>>> Adrian,
>>>>>>> 
>>>>>>> I used Timelab to assess the reaction of the DTS-2077 to different sine 
>>>>>>> wave inputs.  The differences in the noise floor are surprising.  The 
>>>>>>> attached picture was made by taking the output of an HP 8647A 
>>>>>>> Synthesized Generator through a splitter, and then through different 
>>>>>>> lengths of cables to the inputs of the DTS-2077.  The combination of 
>>>>>>> splitter and cable loss meant I couldn't get +7 dbm @ 1 GHz.  If I 
>>>>>>> could have, the 1 GHz line might have been lower than it was.
>>>>>>> 
>>>>>>> Ed
> 
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