On Fri, 27 Dec 2013 02:16:26 +0000 ct1dmk <ct1...@gmail.com> wrote: > Since the amplitude and timing parameters are to be controlled (pulse > timing come from an FPGA) I really need a solution using that trivial > switching element fet or bipolar (and can't really do a more exotic > scheme if I cant electronically control the parameters) also I must use > a transformer because these short pulse are to be superimposed to > another voltage and a transformer becomes very handy to do that. I > interrupt the wire and insert the secondary there to add the pulses.
If you are already using an FPGA, you can use it for pulse forming. Just use some delay line (or two) and an AND "gate". This should give you an easily changable pulse from sub-1ns to an aribtrary long pulse. The problem here is that your delay line will not have the same step sizes for each step of the delay line (varies from 10ps to ~100ps on a Virtex-4). [1] gives a small overview of the problem and where it comes from. There are other papers on TDCs that deal with this and might give a solution how to linearize it. Googling for "vernier delay line linearization" sould give you some results. As output from the FPGA you probably want to use some differntial format, to increase the "steepness" of the rising/falling edge. When you have the pulse you can use some standard RF amplifier circuit that drivers your transformer. Setting the amplitude should be easy too. Attila Kinali [1] "A High Resolution (<10 ps RMS) 48-Channel Time-to-Digital Converter (TDC) Implemented in a Field Programmable Gate Array(FPGA)", by Bayer and Traxler, 2011 -- 1.) Write everything down. 2.) Reduce to the essential. 3.) Stop and question. -- The Habits of Highly Boring People, Chris Sauve _______________________________________________ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.