Bob,
Agreed. I'm just saying that it goes static if you have PWM or something
similar.
As you see, there are many little details out there.
Cheers,
Magnus
On 09/06/2014 08:30 PM, Bob Camp wrote:
Hi
If you are counting on your loop noise to spread your tones out - indeed not a
good idea. There are several ways you can “go quiet” in your loop….
Bob
On Sep 6, 2014, at 2:10 PM, Magnus Danielson <[email protected]> wrote:
Hi Bob,
Indeed. The way to keep the MCU PWM doing reasonable stuff is to use a higher
rate, and then update the PWM value in sync with the wrap-around, and then
alter the value (dither or whatever) so that the average has higher precision.
First degree sigma-delta is actually not a bad strategy and fairly simple to do.
With FPGA you can do more funky stuff, which is what I do.
It is even better if you can use a linear DAC of sufficient rate and resolution.
If you do hold-over functionality with static steering value, that is you stop
updating the EFC-steering (this is what most folks do), then the resolution of
the full steering can dominate the initial frequency offset. So, one should
think about that too.
As you go into hold-over, all of a sudden you can run into idle-tones in a way
that normal dynamics would dither out.
Cheers,
Magnus
On 09/06/2014 07:01 PM, Bob Camp wrote:
Hi
One of the easy things to do with PWM is to dither the LSB. That gives you one
more bit of precision. It still keeps the main tone at the same place.
Your worst case tone happens at 50% duty cycle (perfect square wave). If you do
your 50/50 as a square wave at Fmax(not Fmin), your fundamental “worst tone” is
at your highest frequency rather than the lowest. Not easy with MCU PWM’s,
pretty simple with an FPGA.
By far the best thing to do is to clock your PWM at a nice high frequency (like
a couple hundred MHz). That way you get lots of bits and your fundamental tone
is still pretty high. Again, nice for 400 MHz clock FPGA’s, not so much for
$0.50 MCU’s.
Bob
On Sep 6, 2014, at 12:52 PM, Magnus Danielson <[email protected]>
wrote:
Hi Bob,
Agreed. I often find that modulations eats your margin out.
PWM is interesting in this regard. PWM has the property that the lowest
frequency has the highest amplitude and the overtones then decay with 1/f from
that. For a given clock rate, as you add a bit of PWM precision, you half the
PWM repetition rate and thus move the frequency down... where we are more
sensitive to the modulation it causes, and the 1/f slope of the oscillator does
not help.
I designed a PWM-like signal that has reversed PWM spectrum so that the highest
frequency has the strongest amplitude. The 1/f of the oscillator integration
makes the modulation flat among the different bits and much easier to handle
phase-noise wide.
Another approach is sigma-delta style modulation, which noises out the
amplitude. Higher-degree sigma-delta needs to avoid idle-tones for optimum
result.
Thus, paying attention to these details pays of with simplifying the effort to
achieve good phase-noise properties.
There is more dangers that can occur in PWM-space, but this should be enough of
a starting-point.
Cheers,
Magnus
On 09/06/2014 01:39 PM, Bob Camp wrote:
Hi
Yes indeed, as you go below 1 Hz (or 1 radian/sec) all the things that “help”
you roll off wise now hurt you. If you are worried about sidebands inside 1 Hz,
you need to change a sign here and there. The only thing that saves you is that
the noise floor is now coming up pretty fast.
If you modulate a crystal oscillator, the loaded frequency of the crystal is changed
to accomplish the modulation. When your FM swings 100 Hz high, your crystal is tuned
100 Hz high. When your modulation swings 100 Hz low, your crystal is tuned 100 Hz
low. The Q has no impact in this case. No I did not believe it worked that way until
I did it …. Since then I’ve built a *lot* of VCXO’s with modulation bandwidths
>> than their crystal Q bandwidths. The biggest problem comes from crystal
spurs rather than crystal Q.
Bob
On Sep 6, 2014, at 6:09 AM, Magnus Danielson <[email protected]> wrote:
Bob,
On 09/06/2014 03:00 AM, Bob Camp wrote:
Hi
Oddly enough (and yes it is odd) you can modulate an oscillator well outside
the crystal’s bandwidth. The bigger issue is that the EFC does not pull the
crystal very far on a normal OCXO. The FM modulation index drops to very small
numbers pretty fast as you go up in modulation frequency.
You typically only worry about modulation sidebands that are above the phase
noise floor. Since phase modulation sidebands go down as 1/Fmod on an FM
modulator (for small modulation index) they get pretty low pretty fast.
If your OCXO has an EFC range of 0.1 ppm at 10 MHz, it will swing 1 Hz p-p (+/-
0.5 Hz) for the full EFC voltage. At 5 Hz, you have a modulation index of 0.1.
Of course if you are multiplying to 10 GHz, the index could be quite large.
This gets back to the “this all depends on what you are doing”.
If your EFC is 5V, a reasonably quiet signal would have noise below 0.5 mV. That’s
already 80 db down. A very quiet supply should be in the < 5 nV / sqrt(Hz)
range. That would put the noise down 180 db.
It’s unlikely that your OCXO has a phase noise spec of -180 dbc / Hz at 10 Hz.
We may already be done …
To bring all the numbers together:
At 1 Hz the modulation will do a sideband X db down at your desired frequency.
You will drop 20 db by the time you get to 10 Hz simply due to the 1/F FM->PM.
Since the oscillator integrate frequency into phase, you have a 1/(2*pi*f)
factor. The typical LaPlace model for an oscillator is Ko/s, where Ko is the
input sensitivity of the oscillator.
A more complete model needs to include the Q of the crystal, naturally, unless you are
"in-band" of that Q where it has less drastic properties.
Bottom line - it’s not all that hard to get a quiet enough EFC voltage.
Agreed.
I've found that thinking about systematic noises of low frequency (i.e.
comparator frequency and overtones) as well as loop dynamics is what one should
think about. Lack of DAC resolution hurts.
Cheers,
Magnus
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