Hi, On 12/09/2014 10:30 PM, ed breya wrote:
I'd recommend going with what Bob Stewart mentioned, using separate gates as buffers, operated from a better-grade reference, to shift from the noisier and driftier logic supplies, into the more critical circuits. It's simple, and can be powered from a modest reference circuit.
I've used this technique myself with great success. Nice way to convert "dirty" supply digital bits into benign noise supplies digital bits.
If the logic circuits themselves need better supply noise and tempco performance, don't use any kind of three-terminal regulators - use a good opamp driving a pass transistor. Use a reference IC that has a buried zener for lowest noise - this eliminates all the low voltage references and three-terminal etc regulators that use band-gap references. The down side is that the good kind of reference ICs will need a higher (like 10V and up) operating voltage than may be available, so that complicates it.
One should not trust the transition levels of logic to do any sine to square shaping. Most of that should have already been done before it meets the inherent comparator level of a logic gate. That you have sensitivity to power supply traceable to gate comparator voltage is a sign that you need to shape up first. Only once you have jolly good slew-rate you can hit a logical gate for further shaping, and that's when swapping power-supply using the above trick should be a trivial exercise .
Cheers, Magnus _______________________________________________ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
