Typically a PLL loop uses a PI loop-filter, making it a PI-control system with a steered integrator in the form of the oscillator. Many other control systems prefer to use the PID controller
I have seen no evidence that the Thunderbolt, in particular, uses a D term. Nor have I seen any evidence that it steps the PLL loop parameters during startup. It *is* capable of "jam setting" the oscillator phase (allowing cycle slips to reset the phase error within +/- 50 nS), which can speed up the lock time considerably. I thought it was supposed to do this automatically if you turn jam setting ON and set a phase error limit, but I have never seen one jam the phase without sending it a manual jam command, even with jamming ON and a phase error limit set.
If anyone has managed to get a Tbolt to jam the oscillator phase automatically on startup, I'd be interested to know how.
Best regards, Charles _______________________________________________ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
