The typical noise generator chips uses a PRNG based on DFFs and XOR
gate(s). A typical weakness is that the chain of DFFs is to short,
causing a relatively high rate of cycling, which hearable as a beating.
However, for some uses, that is OK.
Cheers,
Magnus
On 02/06/2015 07:16 PM, Mark Sims wrote:
Several of the reciprocal counters (DC509, DC5010) Tektronix built for their
TM500/TM5000 test equipment mainframes use a National Semiconductor noise
generator chip to dither their reference clock. They do this mainly to handle
the case where the input freq and reference clock are very close.
The noise generator chip is not a true noise generator. I think it used a ROM table to
play back a fixed "random" bit pattern.
_______________________________________________
time-nuts mailing list -- [email protected]
To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
and follow the instructions there.
_______________________________________________
time-nuts mailing list -- [email protected]
To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
and follow the instructions there.
