> Is this a sensible thing to consider doing? Or would I be better sticking to > AC/HC/AHC/LVC logic? > > Regards, > David Partridge
Yes, please consider it. I would be very interested in the results. We measured under 2 ps jitter for the PIC dividers [1] used with the cute little TADD-2 board [2]. One of these days I should measure your divider board with the same setup to see how it compares with a PIC. Like a CPLD/FPGA the PIC has the advantage of being fully synchronous and all on one die. /tvb [1] http://leapsecond.com/pic/ [2] https://www.tapr.org/kits_t2-mini.html _______________________________________________ time-nuts mailing list -- [email protected] To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
