On 25/08/15 18:53, Andrew Symington wrote:
Hi Folkert
If you have a board with a hardware timer that supports load/match/compare
then you can schedule an external interrupt to be generated at a
predetermined point in the hardware count. Thus, if you know the transform
between your disciplined clock and the hardware counter of the timer that
drives it, then you should be able to do this. I have spent some time
working with the (pretty neat) timers on board a beaglebone black, and I've
written some code to setup input capture and compare on up to 4 timers:
https://bitbucket.org/rose-line/roseline/src/35d551bf29e4bfec80f8ba667b199c8aa333b87f/core/modules/roseline.c?at=master
Wait...You mean with your driver I essentially have a A->B->C->D TIC ?
_THAT_ I have a use or three for...
Since there is also code out there to drive a BBB from an external
reference via TCLKIN, this gets very interesting.
I might just have to compare your code against my own TIC code using
the PRUSS (Although that's only a traditional A-B or A-A TIC at the
moment, extending to 3 or 4 inputs would decrease the precision and
accuracy...)
On Tue, Aug 25, 2015 at 8:24 AM, folkert <[email protected]> wrote:
Hi,
Not sure if it is interesting for you guys but I wrote a simple program
for e.g. Linux (or any other system with the pps api implemented) that
listens on a pps source waiting for a pulse and then toggles a gpio
pin. That way you can measure the latency introduced by the the kernel
when listening from userspace. Note that there's a little extra latency
due to the gpio-pin handling.
Oh this might be very interesting, esp with something like the BBB,
which has the excellent counters that Andrew discusses above. Presumably
it is a five minute job to modify your code to do something other than
twiddle a GPIO pin.
It would be very useful to try and characterise that kernel delay. I
will add it to the list of things to try, once I finish moving the time
lab around!
Iain
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