Please note that not all the frequencies will be utilizable, here only
433MHz is free-for-all and at low power: only under 50mA transmitting power.
There are some very cheap FSK transmitters that can output at a maximum
rate of 9600bps: a 1KHz quad signal on these carriers, can drive a GPSDO
like the 10KHz output of some GPS receivers? The clock being compared to
this would be 10MHz downscaled by some decade counters.
this would be much simpler to implement.
Ilia.
Il 27/04/2016 23:38, Bruce Griffiths ha scritto:
On Wednesday, April 27, 2016 09:40:05 PM Attila Kinali wrote:
On Wed, 27 Apr 2016 20:18:10 +0200
Mike Cook <[email protected]> wrote:
Use this CW signal on all the telescope stations to phase lock a local
OCXO. Using a good OCXO, it should be possible to use loop bandwidths
in the 0.1-10Hz range. My guess is, that this frequency transfer system
would yield stabilities in the order of 10^-12 @ 1s (or even better).
For additional performance, one could modulate the CW with a PRN
sequence
to get a better SNR and probably get another order of magnitude out of
it.
For the simple CW case, the circuitry should be fairly simple and easy
to do. The PRN case would require at least some processing in an FPGA.
It might be possible to clock the FPGA directly from a suitably massaged
CW. Do any clock at 1GHz+???
It would be also possible to do away with LO’s in this case..
That would make the system more complicated than simpler, because
you need to extract a signal from a noisy environment, pass it through
narrow band filter so you get something that resembles a sinus in order
to use it in the electronics. This kind of works when the reference
signal comes in via cable. With over the air transmission, this wont work.
Using an OCXO together with a PLL basically forms a very narrow band
filter that has a very small tempco, adjustable (and adaptive)
frequency and allows to change the filter coefficiencts quickly
to acquire the signal at start-up.
Very few chips (of any kind, not just FPGA) allow input clocks higher
than a couple 100MHz. Single ended CMOS inputs usually go only up
to 200MHz, often much lower than that. Differential (LVDS and PECL)
ends usually in the 500MHz range.
Also. Running an FPGA at 1GHz is not trivial at all. Most designs
don't do more than 500MHz even on the fastest FPGAs out there.
100-300MHz are common values. And unlike with CPUs, there is often
no need to run an FPGA faster than the data arrives or leaves, as
the functions can be run in parallel and use a pipelined architecture..
The CW could also carry time, and if it was feasible, local GPS would be
unnecessary.
If the CW would carry time, it wouldn't be CW anymore ;-)
Yes, that's the idea with the PRN modulation i mentioned in the other mail.
But it wont lift the necesity of GPS. There is an unknown delay from the
sender to the receiver, through multiple filter and frequency conversion
stages. Some of them can be measured, some of them come from the ambiguity
of the phase in the system. Others, like the path delay, cannot be measured.
One solution would be, to use 2 transmitters with known positions and
known phase relations, then it would be possible to extract time,
given one knows the positions of the receivers exactly.
To get around that requirement, one would need at least 4 transmitters...
Ie. one would be recreating the GPS system... at which point it becomes
simpler to just use GPS and live with the degraded accuracy.
Also keep in mind, that with GPS it is well known where the errors
come from and how big they are. Also lots of techniques are implemented
to counter those. With a DIY-GPS system, one would need to implement
those and measure their performance again, which would be a whole lot of
work.
Attila Kinali
The solution to this conundrum is to use a high speed serial to parallel
converter and proces 4/8/16 timeslots in parallel at 1/4, 1/8 or 1/16 the
serial clock rate as required.
If the high speed serial interface offered by many modern FPGAs could be used
for this then 100ps or finer timestamp quantisation may be feasible.
Bruce
Bruce
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