Neat Project. I don't know if it will come up for you but optical or hall rotary encoders are notorious for jitter. While a generic IC comparator may have an open loop-gain of 100 dB, creating the mechanical equivalent is not so easy. Hall/optical have a softer switch on/off curve. Depending what you choose to instrument your pendulum may also introduce more jitter. The 20logN dosen't help either, 1 millideg at 0.5 Hz is 5.5 cycles at 1 MHz.
On Mon, Mar 20, 2017 at 9:07 PM, David Scott Coburn <scot...@optonline.net> wrote: > Hi All, > > I have built and tested a PLL circuit that will be used to generate a 1 > MHz signal locked to a 0.5 HZ signal from a pendulum. (Details available > upon request.) > > The circuit is a classic 4046 generating the 1 MHz signal which is fed > into a 2e6 digital divider which outputs 0.5 Hz which is fed back to the > 4046 phase comparator (PC). > > I take a 1 MHz signal from an HP 107A run through another 2e6 divider to > generate a reference 0.5 Hz signal for the other 4046 PC input. > > I tested this by feeding the 0.5 Hz output of the PLL into a "time-stamp > counter" board which I built to go into an HP 3582A Data Acquisition unit. > The TSC uses the 5 MHz signal from the HP 107A to feed a free-running > 32-bit binary counter. The 0.5 Hz input latches the count value (on the > rising edge of the signal), which is then logged. > > See the attached diagram. The PLL under test is in the red box. (Not > sure what the policy is here for attachments?) > > If all was perfect I would get a string of values of 10,000,000 counts > each, one every 2 seconds. > > Over the course of one day the average reading is, in fact, 10e6, so the > PLL looks to be working over "long" time scales. > > The attached histogram plot shows the actual data for the 0.5 Hz signal, > showing the distribution of deviations from 10e6 counts. This is almost a > full day of data, about 40,000 readings. > > The standard deviation for the data is about 55 counts. > > The plot looks to my eye to be a nice Gaussian shape, so I assume that the > deviations are caused mainly by (white?) noise. There does not look to be > much other structure in the shape of the data. (Comments welcome.) > > Sorry for the long introduction, there are some questions coming! > > I have looked for information on the web about others who may have done > this kind of PLL, but did not find much. > > Does anyone know of any articles related to this? > > If so, do you know what kind of performance they got? > > What kind of statement could I make about the 'stability' of this > circuit? Simplistically: a 'stability' of ~50 counts in 10e6 is ~5e-7? > > By the way, this performance is WAY WAY beyond what I was expecting.... > > Cheers, > > Scott > _______________________________________________ > time-nuts mailing list -- time-nuts@febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/ > mailman/listinfo/time-nuts > and follow the instructions there. > _______________________________________________ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.