I have done a lot of phase noise modeling using LT SPICE over the years for PLL’s. It will not model the phase noise of the individual devices like VCO’s, dividers, phase detectors. You can input the phase noise profiles of the various devices and it will give the output phase noise of the loop using AC analysis. If you want to model the phase noise of a VCO at the transistor level, you need a harmonic balance program that supports VCO noise modeling. It is very difficult to module the phase noise of dividers, at the transistor level but it can be done. I did a presentation a few years ago at the European Microwave Conference on using CAE to model phase noise in PLL’s.
https://www.slideshare.net/edrucker1/european-microwave-pll-class Eric Drucker Agilent (Keysight) Technologies, Retired _______________________________________________ time-nuts mailing list -- [email protected] To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
