Hi

CMOS is good. The faster the better. Go to your favorite vendor and find 
whatever is “king” this month
and that’s what you go with. HC has been around a *long* time and is about as 
slow as it gets in terms 
of 5V CMOS ( yes, 4000 series is slower still …).  Faster means less delay in 
the gate (so lower variation
in delay). It also turns out that faster means lower phase noise so lower 
jitter. 

Buffers are better than inverters, simply because they have higher output drive 
capability. One “favorite”
are the x125 and x126 tri-state buffers. NC7SZ125 and NC7SZ126 are two 
examples. 

If you want to drive 50 ohms, you likely will need to parallel gates in order 
to handle the current. There is 
an ongoing debate about source termination vs load termination vs “both 
termination” vs “don’t bother”. 
I would suggest that terminating one end or the other is a … errr …. really 
good idea. 

Lots more information in the archives.

Bob

> On Mar 17, 2019, at 6:39 PM, Taka Kamiya via time-nuts 
> <[email protected]> wrote:
> 
> I'm very curious, too.  Especially when I *just* built one using 74HC04N.  
> 
> --------------------------------------- 
> (Mr.) Taka Kamiya
> I'm stuck in a wormhole....  Hello, worms! 
> 
>    On Sunday, March 17, 2019, 4:01:26 PM EDT, Hal Murray 
> <[email protected]> wrote:  
> 
> 
>> For 1PPs the main goal is jitter and the selection of the ICs is very tricky 
> 
> Could you please say more?  Do you mean logic family selection, or chip 
> selection within a family?
> 
> Most modern digital chips are CMOS with an input threshold of VCC/2.  I'd 
> expect power supply noise to be important and families with faster switching 
> times probably make more noise.
> 
> 
> -- 
> These are my opinions.  I hate spam.
> 
> 
> 
> 
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