On 9/1/19 10:10 AM, Bill Slade wrote:
Hello, This is a topic that interest me greatly as well. Some of the work we have done uses a digital frequency tracking loop to generate frequency errors directly from sampled data using a sampling system and ethernet system of our own design. We opted for using a look-up table-based DDS in the final frequency conversion to baseband (you mentioned considering CORDIC) and CIC filters/decimation..all in FPGA (Altera Cyclone III). This was done for testing two-way coherent transponders. See a description here<https://www.researchgate.net/publication/332241644_Coherent_tracking_error_characterization_in_microwave_transponders>.
This is quite interesting.. It's always a challenge to adequately characterize the turnaround performance of a transponder, particularly in a rapidly changing Doppler environment.Say your probe is orbiting Europa or Titan, and you want to do precision radiometric measurements for radio science.
back in the day, with an all analog transponder, you could test at constant frequencies, and do some analytical stuff to estimate incremental ADEV in the turnaround, as well as the imperfections from tracking a higher order variation in Doppler than the loop order. And mission design didn't do orbits around moons, but flybys (e.g. Cassini, Galileo, Voyager) But these days, most transponders implement the carrier tracking loop in software, and there's always all sorts of arguments about what the implementation of that loop does to the turnaround.
Yes, it seems to me that a band limiting filter on the input would be absolutely necessary, since the sampling BW of the ADC is so high.
and, probably, on the sampling clock - the clock input on these kind of devices is also quite wideband
_______________________________________________ time-nuts mailing list -- [email protected] To unsubscribe, go to http://lists.febo.com/mailman/listinfo/time-nuts_lists.febo.com and follow the instructions there.
