Hello,

 

Have anyone had any luck designing a phase lock loop with very small
bandwidths, e.g. less than 0.2 Hz.

 

I need to lock a 100 MHz Ultra low oscillator to a 10 MHz ultra low
oscillator and I need a loop bandwidth less than 0.2 Hz.

 

Quartzlock do a digital PLL board with bandwidths to 1 mHz.  However I never
got it to work.

 

The 10 MHz reference has phase noise of -116 dBc/Hz at 1Hz offset.  The 100
MHz VCO make -104 at 1 Hz.  

 

Obviously I'm trying to preserve the 100 MHz phase noise.

 

Any advice would be appreciated.

 

Best Regards

Martyn 

 

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